New system designs often have a 33% fail rate! Learn how to make that significantly better through parts placement, orientation, and knowledge of the assembly process. This class is less about PCBs and more about learning to work with assembly shop practices and understanding the assembly process. This class is based on the presenter’s experience as the EE in charge of working with the in-house assembly operation to increase yield. Design for assembly (DfA) is crucial to improving first runs and getting them to production-friendly yields.

Differential pairs are the primary routing style used in many high-speed digital protocols. The current class of advanced digital systems will rely on data rates up to 224Gbps channels with PAM-4 modulation. Examples include data center architecture, servers, compute accelerators, and high-end applications in mil-aero. This presentation will show the fundamental theory and practical applications of designing differential interconnects for these very high data rates.

Designers will learn important contextual points surrounding differential pair design and routing in high-speed PCBs as they apply to 112G and faster systems. Some basic factors affecting signal integrity at high speeds and in high-bandwidth protocols will be presented. The resulting design decisions and best practices will be supported by simulation data prepared by the author and from other experts in the field.

Topics to be addressed and lessons learned include:

• Examples of PCB stackups that can support routing in these systems
• How materials affect SI at these very high data rates
• Via designs targeting 28 and 56GHz bandwidths
• SI factors such as mode conversion and reflections
• Examples from demonstration/test boards that illustrate best design practices
• Factors affecting differential channel bandwidth
• Approaches for modeling designs targeting these bandwidths.

Examples of real systems that were designed by the author and have entered volume manufacturing will be presented to illustrate these important concepts. Simulation examples will also be used to help illustrate the importance of certain design choices, and to illustrate some basic rules that help ensure signal integrity. Designers will learn the important concepts and practices required for successful differential pair design and routing in systems operating from lower speeds up to 56GHz bandwidths.

Amid the fast-paced advancements in PCB design, thermal consideration and thermal management of designs is of paramount concern. Engineers and designers are constantly seeking innovative ways to meet efficiency and reliability standards. This seminar aims to explain complex thermal theories and introduce practical approaches to optimizing PCB design for superior thermal performance. An examination and understanding of the design strategies and process to promote a performant and reliable system. This will be tied together with design examples and personal anecdotes.

Key topics to cover:

• An explanation of heat transfer mechanisms: Conduction, convection and radiation, will establish a solid foundation in order to explore thermal management in PCB design
• Introducing the process of the Thermal Design Engine and how it applies to your applications
• Unveiling the process of preliminary thermal structuring, physical testing, and refinement of the system, illustrated through case studies.
  Further, the seminar delves into the diverse landscape of PCB materials and design strategies:
• A comprehensive overview of IMS and aluminum boards, shedding light on material selections, stackup configurations, and the mantra “copper is your friend” in board design
• An introduction to copper coins, their types, applications, and their important role in heat dissipation, complemented by a real-world high-power MOSFET design case study and a comparative analysis of a high-power MOSFET with and without a copper coin
• A showcase of simulations reflecting the impact of conductive vs. nonconductive fill vias in thermal management.
  The discussion explores simulations on thermal performance with a comprehensive simulation, evaluating the thermal performance of the discussed design strategies, and integrating learned concepts into system design.

What you will learn:

• Real-world examples and hands-on experience with various thermal management strategies
• Techniques for effective thermal simulation, analysis, and integration into their PCB design workflow
• Insights into collaborative frameworks that foster innovation in thermal management, de-risking designs, increasing the likelihood of success and reliability.

Join us to demystify the intricacies of thermal management in PCB design and propel yourself toward a mastery of the art and science of creating thermally efficient and reliable systems.

The second half of a six-part presentation.

Part 4: Feeding the Beast: Consumption-based PCB Design. This session is a step-by-step guideline for determining the PCB design requirements based on device energy consumption requirements. Wave cycle times and transmission line capacity form the basis of this philosophy. The segment will begin with a review of EM field behavior and transmission line design, then outline a process for analyzing the real power delivery challenge posed by a high-performance microprocessor. Starting with the DC current specification, we will use the device package pinout to determine the necessary PCB networks required to support the delivery of power to the device. The course will center on the LS1043 Network processor, with a focus on the core power supply requirements (7A/uS). The package pinout and clock frequency will be used to determine the real “coulombs per wave cycle” the PDN must support. This will then be used to design both local storage requirements and connecting structures. A spreadsheet will be presented, which can be used to do a quantitative analysis of the transmission line capability based on the impedance and length, so the number of wave cycles needed to deliver the required charge. This perspective can be used in the initial design phase or to evaluate existing designs. EMC test results from a production design, MPC-LS-VNP-MOD, using this approach, will be presented.

Part 5: Stacking the Deck: Maximizing the PCB Layer Design for Signal Integrity and EMC Performance. This segment focuses on the importance of understanding the role of the PCB layers in directing the signal and power supply energy between the board layers. The focus is on knowing which dielectric you are using, and how to move that energy between dielectric layers in the PCB.

Part 6: HDI Via Design: Planning the Energy Pipelines. This segment focuses on the importance of understanding the advantages and limitations of high-density via usage. The key is understanding how to connect the signals and grounds through the board stackup. It is also essential to understand what is needed to provide the proper thermal connections between the ICs and ground planes.

Effective printed circuit board (PCB) design extends beyond the meticulous consideration of layer stackup and appropriate PCB materials; it equally hinges on the strategic integration of assembly elements. Recognizing the pivotal role that assembly processes play in the manufacturability of a board, this course provides participants with a comprehensive understanding of the intricacies of assembly procedures. By immersing attendees in the nuances of the assembly process, this training empowers them to adeptly navigate the feedback loop, thereby guaranteeing the triumph of present and forthcoming designs.

The course will delve into the following aspects of assembly:

• Small components and stencil requirements
• Designing with thermal relief and why
• Typical assembly issues and how designers can fix them.

This course imparts theoretical knowledge and reinforce learning through practical application. With instances of failures and conducting in-depth analyses of their root causes, participants gain valuable insights into preemptive strategies. Armed with this knowledge, they will be able to proactively mitigate potential issues, ensuring a resilient and successful approach to their current and future designs.

This study focuses on developing low-cost, sustainable new printed circuit board (PCB) materials for computer systems operating in immersion-cooling environments. As cloud service providers transition data centers from air cooling to immersion cooling, the demand for PCBs suitable for such environments increases. Immersion cooling offers significant advantages over air cooling, including lower and more stable operating temperatures (30-50°C), humidity-free, and a non-combustible environment (oxygen-free). These conditions are particularly beneficial for PCB materials like copper-clad laminate (CCL).

Leveraging these benefits, we have developed customized CCLs for immersion-cooling computer systems.

Our strategy for new CCL material development includes:

1. Leveraging lower and more stable operating temperatures (30-50°C). Signal integrity (SI) performance requirements are more easily met with CCL in immersion. Unlike air-cooling conditions, which often require additional advanced polyphenylene oxide (PPO) added to CCLs to meet SI performance at higher temperatures (up to ~10°C), we aim to reduce PPO content in new CCL resins and explore alternatives to replace PPO with more readily available materials for immersion CCLs.
2. Leveraging humidity-free. The need for moisture absorption resistance is more easily addressed in immersion. In air-cooling conditions, halogens like bromine (Br) and chlorine (Cl) are added to enhance moisture resistance. We propose reducing Br and Cl in immersion CCLs.
3. Leveraging non-combustible environment (oxygen-free). Without flammable conditions in immersion, meeting UL flammability requirements becomes more straightforward. Since Br and Cl are typically used to improve flammability resistance in air-cooling conditions, we plan to further reduce their proportions in immersion CCLs.

Comprehensive testing of the new immersion CCLs and PCBs includes:

1. Immersion CCL performance and reliability tests:
   • Moisture absorption rate
   • Dielectric constant (Dk) changes after immersion
   • Dissipation factor (Df) changes after immersion
   • Reliability after immersion
2. Immersion CCL PCB SI performance and reliability tests:
   • Insertion loss measurements at different temperatures
   • Insertion loss before and after immersion
   • Reliability tests including interconnect stress test (IST), accelerated thermal cycling (ATC), and conductive anodic filament (CAF), among others.

In conclusion, this case study demonstrates the potential benefits of new CCL materials in immersion-cooling environments. Immersion-cooling not only provides advantages to data centers but also enables the use of cost-effective, sustainable new CCL materials, reduces the use of environmentally harmful substances, and decreases the overall carbon footprint of PCB development.

Virtually all ICs used in digital circuits today have very fast rise time outputs, including many previously slow microcontrollers. Traces on boards with fast rise and fall times are referred to as high-speed transmission lines. Many items cause signal integrity issues in such lines. One associated set of contributors to SI problems is lack of proper impedance control, routing and termination. Understanding a few simple concepts can take a circuit from failure to success and understanding the concepts well can also reduce cost and layer count of PCBs.

This two-hour course will discuss and define:

• When does a routed line become “high -speed?”
• Movement of energy in transmission lines
• Behavior of lumped vs. distributed length transmission lines
• Incident wave vs reflected wave switching of IC loads
• The effect on signal integrity of improper trace routing.
• Best line termination schemes, including optimum resistor value
• Matched circuit timing, with proper line length control.

Artificial intelligence is quickly becoming a force in ECAD and electronics manufacturing. Will the intelligence in these tools supplant or accentuate today’s workforce? And how must the industry adapt to the changes? This is intended to give a snapshot of where we are, what’s feasible, and the forecasted timeline for implementation, straight from the companies that are driving the technology.

There is much talk about how AI will be impacting our future. This presentation will pull together some of the current thinking about AI from different industry experts with the goal to provide PCB designers information and hopefully some guidance about how we expect AI to impact PCB design in the two-, five- and 10-year timelines.

Key topics to cover:

• Define/distinguish among automation, AI, generative AI, LLMs
• The latest thinking on AI from major CAD players like Altium, Siemens (Mentor), Cadence, and Dassault Systèmes
• How AI will affect the day-to-day work of the PCB designer
• Does AI pose an existential threat to the profession of PCB design?
• How today’s PCB designer can best prepare to be ready for the changes that AI will bring to the industry
• How we protect IP in an AI environment
• How each company/designer will bring unique IP to their AI integration.

It is important to note that this is a speculative talk based on some of the latest information available. Information about AI is changing rapidly. Some companies are willing to disclose only certain things that they are working on to the public. The goal is to educate and try to shed light on this rapidly developing, important influence to our industry with the intent that this will help us take a step forward together to make good decisions about our careers and how to best integrate new tools and features into our work to get optimal productivity and career gains.

Debate is ongoing among many printed circuit design engineers about the use of copper pour segments in or on some layers of PCB. Some say copper pours can increase crosstalk, change impedance of transmission lines, increase EMI, or have an impact on power delivery, etc. Others say that the opposite is true. This session will discuss the “real” impact, good and bad, of copper pour segments on signal layers of PCBs.

This new one-hour course will discuss and define:

• Reasons to put copper pours on signal layers
• Should copper pours always connect to ground?
• Measured impact of pours on impedance of lines
• Measured impact of pours on energy coupling
• Measured impact of pours on power delivery
• Impact of copper pours on PCB manufacturability.

Many aspects of a printed circuit board (PCB) determine its cost. The specifications drive the manufacturing process. In turn, this affects PCB price and sustainability.

This presentation provides insight of how PCBs are priced according to the fabrication drawing and Gerber data. Hard cost drivers, such as size, material, and build complexity cannot always be changed, but could have a bigger impact on the cost. Soft cost drivers like over-specification, lead times, and transportation may also have a great effect on the price. An understanding of the cost drivers will help engineers plan a more sustainable PCB for the future.

In preparation for this presentation, we talked to many of the largest PCB manufacturers in the US and abroad. We then developed a list of the most common errors found on incoming designs. We look at each of the errors and discuss ways to find them before the designs are sent out for manufacturing. Methods we will look at include netlist comparison, design for manufacturing, and design rule analysis. We also talk about proper documentation needed for PCB manufacturing. We encourage attendee participation and ask folks to bring their challenges for discussion. After this seminar, the PCB designer will take back some knowledge to better assist them in using their existing tools in the market to produce better and more accurate designs.

A process engineer responsible for a process with a long-term defectivity of 950,000dppm (95% scrap rate) would not last long in that role. A car company delivers a new car to a buyer where the buyer had to complete the design and send a list of changes back to the supplier proposing modifications so it would start and correct the car because some of the features do not work per the advertising description.

This describes the state-of-the-art of design data transfer in the printed circuit board industry. A PCB data package contains multiple files that are sent with incomplete, erroneous, and conflicting specifications. Bad files are routinely sent that impede creation of production files while resolving the issues.

This session will discuss this issue, focusing on one of the most erroneous files, the 35-year-old IPC-D-356 netlist. The problem will be described, discuss why industry standards are part of the problem, and how it has been resolved by using the industry standard IPC-2581 data format. We will also present a revolutionary format using an intelligent netlist for three additional PCB fabrication inspection processes.

As members of the electronics manufacturing industry, we often discuss the issue of material circularity, especially when it comes to printed circuit boards, and whether they can be recycled or created more sustainably.
The session will delve into topics ranging from material circularity in PCBs, to the environmental impact of technology, and the potential recyclability of the PCB product itself which NCAB has tested with customers. During this year we will join forces with some German labs and EMS companies to test how those materials perform in real use cases in terms of soldering processes, long-term reliability, and whether the material meets IPC Class 2 and 3 requirements after soldering.

This course will walk the audience through the entire multilayer PCB fabrication process, making stops along the way to explain how PCB design requirements affect the numerous fabrication steps and if/how the finished product can meet the intended quality and reliability requirements. A detailed explanation will be given for each of the process steps and how that step affects quality and reliability.

Key topics to cover:

• Design requirements, with an explanation of the dos and don’ts of how they affect fabrication and impact yields
• Process controls adopted by the fabricator to ensure maximum yields and quality are maintained during each step of fabrication
• Pros and cons of variables available to the designer:
  • Solder mask
  • Surface finish
  • Materials selection
  • Copper weights
  • Feature size, etc.

The course also looks at fabrication drawing specifications and how they can affect yield, cost, quality and reliability.

Many engineers are now required to design their own PCBs, but have not had the benefit of learning the particular needs of the electronics, signals, placement, routing and manufacturability in those boards.
This class will feature an overview of the processes of board design from an engineering perspective. To begin, we will have a conversation about the electronics and physics involved and why controlling rise time, field energy, and transmission lines is extremely important to the signals on the board. Placement will be discussed next, with some of those topics including order, flow and setting up potential routing to come. The planes and stackup structure play a major role in the quality of the design and impedance control, especially if the design is high-speed; and plane and capacitor placement are a large part of power distribution as well. The way signals are routed and how their return current is set up is critical to performance.

Also discussed:

• Fanouts
• Grids
• Signal flow from layer to layer
• Layer paired routing and spacing.
• HDI technology can be a huge benefit to dense boards, fine-pitch parts and BGAs, so we will go over their setup and routing.

All these topics will include information on signal integrity, EMI and impedance control, to make a board that works well from the first build. Many aspects of making a board manufacturable also help to make it less expensive, so an examination of that will wrap the technical things up, followed by information on the pros and cons of hand routing vs. autorouting and impact on board quality.

In all high-speed/high-frequency circuits, signal integrity is dependent on several variables, all of which accumulate to impact the noise budget of the circuit. With very high-speed circuits, an even larger number of issues come into play, and all the effects are more extreme. Problems can be driven by design deficiencies, some by the physical structure and design of the ICs, and still more are driven by the PCB’s copper style and base material parameters.

This two-hour course will discuss and define:

• Signal noise budgets and attenuation basics
• Signal jitter and inter-symbol interference
• Basics of transmission line discontinuities
• Cause and effect of ground and Vcc bounce
• Cause of skin effect and loss tangent issues
• Impact of pre-emphasis and equalization
• Via stubs and cost-effective solutions.

Why does what you see on the oscilloscope not look like a square wave? At today’’s speeds, traces behave very differently from what we were taught in college. This is a presentation on high-speed basics that helps make the subject intuitive in a different way. Learn about how frequency affects propagation, transmission line flow, impedance, noise, and reflections with easy-to-understand animations and analogies to understand this subject on a deeper level. Redone this year with more examples of good/bad layout.

This presentation examines the basic design principles required to design a rigid-flex PCB. We first look at the definition, purposes, and uses of rigid-flex PCBs. This design technique is particularly useful in applications where space is limited and the circuit needs to conform to a non-planar or three-dimensional shape. We look at how combining rigid and flexible circuitry within a single board allows for cost savings in the manufacturing process.

1. Definition: Rigid-flex PCBs consist of rigid and flexible board areas interconnected through plated holes. The rigid sections maintain stability and support components, while the flexible areas provide the necessary flexibility for folding or bending the board.
2. Applications: Rigid-flex PCBs are commonly used in applications where traditional rigid boards or flexible circuits alone may not meet the requirements. Examples include aerospace, medical devices, wearables and other electronic devices with complex form factors.
3. Design considerations: Designing rigid-flex circuits requires careful consideration of mechanical, thermal, and electrical factors. The board’s flexibility must be balanced with the need for rigidity in certain areas, and bending radii should be adhered to prevent damage.
4. Layer stackup: The layer stackup involves alternating rigid and flexible layers. This permits the necessary combination of structural integrity and flexibility. Copper layers, dielectric materials, and adhesive layers are carefully chosen to meet the mechanical and electrical requirements.
5. Bend radius: The bend radius is a critical factor in rigid-flex design. It defines the minimum radius at which the flexible part can bend without damaging the internal layers or causing performance issues. Designers must adhere to specified bend radius guidelines provided by manufacturers.
6. Flex-to-rigid transition: The transition between rigid and flexible areas involves carefully designed bending zones. These zones include gradual transitions with curves or accordion-like folds to prevent stress concentration and ensure reliability during flexing.
7. Component placement: Component placement plays a crucial role in rigid-flex designs, allowing for reliable electrical connections between the rigid and flexible sections. Proper placement and reinforcement are essential to prevent mechanical failures at these points.
8. Material selection: Material choices are crucial in rigid-flex design. Selecting flexible substrates, adhesives, and coverlay materials should align with the environmental conditions, thermal requirements, and overall performance expectations.

In conclusion, designing rigid-flex PCBs involves a careful balance of mechanical and electrical considerations to achieve a reliable and functional product in applications demanding flexibility and three-dimensional form factors.

How to reach the maximum capacity interactions between processor and memory using the new Dell/Jedec CAMM connector. The demand for speed is here and now from media, CAD, 3-D design, scientific research and data analysis, AI, and machine learning. This presentation aims to explore through the eyes of the designer the key design challenges when routing DDR5, from processor and memory placement considerations to maximum speed and performances.

1. What is the CAMM connector on external modules, not motherboard
2. DDR5 vs. previous DDR
3. LPDDR vs DDR
   a. Voltage differences
   b. DRAM layout difference
   c. Constraint differences
4. Placement and pattern of DRAMs
5. Pattern of DRAM placements
6. To mirror or not
7. Sharing command addresses
8. Length matching philosophies. SODIMM vs CAMM
9. Offsets for length matching
10. Special cases of length matching
11. Single channel/dual channel
12. Signal impedance
13. Planes.

You’ve done it! You have created the perfect design that will meet all your customer’s signal integrity requirements! However, you were not aware that your design choices have cleanliness consequences and now your customer informs you that your “perfect design” has failed in the field. Their investigation finds that this failure was caused by flux residues that grew dendrites, causing a short circuit. In this situation it is easy to point the finger at whomever assembled the PCBAs, but a number of design choices likely could improve the cleanability of a design.

In this presentation you will learn how to design for reliability by making proactive design choices that will greatly reduce the failure rate of a design in the field. You will learn about the various PCB cleanliness failure modes and how end-use environmental factors contribute to system reliability. We will also explore how to find cleanliness failures when things don’t go as planned.

The majority of this presentation will focus on specific design choices that can be made and how exactly those design choices help or hurt the cleanability of a design.

Topics covered:

• Cleanliness verification methods
• Flux selection
• Component geometry
• Layout for cleanliness techniques
• Conformal coating
• Cleaning methods.

SIR test results from my ongoing PCB cleanliness case study will be shared throughout the presentation as objective evidence for these design concepts. What you will learn:

• How cleanliness failures occur
• How to avoid failures by being proactive in design choices
• How to design for reliability.

“This course covers the entire gamut of flexible and rigid-flex circuits from two of the most recognized names in the flexible circuit industry: Mark Finstad (co-chair of IPC-2223) and Nick Koop (co-chair of IPC-6013).

Topics covered include:

• Mechanical design/material selection
• Cost drivers
• Bending and forming concerns
• Testing
• Issues unique to rigid-flex.

This course also includes a complete virtual plant tour of a flexible circuit manufacturing facility to help attendees understand the manufacturing processes. Throughout the presentation, the instructors will share real-life stories of flexible circuit applications gained over 35+ years in the industry. Some are success stories, others not so much, but all provide excellent lessons learned. The instructors also welcome and encourage questions and enjoy wandering off-course with lively interactive discussions on specific topics from the class.”

How often do do we receive a schematic from the electrical engineer and the PCB layout starts in haste? Weeks of effort are spent, and the layout completed based on our own understanding, but during the final review we realize the design doesn’t comply with the fundamental requirements, as they were never properly conveyed and documented. What now? It’s time for frustration and probably a design respin. This scenario can become worse if the issues are raised after fabrication and assembly.

Ever-increasing rising and falling clock edges of an IC demand an innovative and smart design approach rather than a conventional approach. In this session, we’ll discuss the best practices/standard operating procedure to overcome this situation effectively and efficiently.

What you will learn:

• The collaborative approach to involve major stakeholders early in the design phase
• What kind of documents and meetings are needed before kicking off the PCB layout.
• How to acquire and document the mechanical requirements
• How to ask the EE to make the system block diagram effective and meaningful for the PCB designer
• How to understand the electrical side of the design and incorporate those insights into the layout.

EMI occurs because some mechanical structure, within or attached to the system, is capable of resonating and radiating stray electro-magnetic field energy. Those mechanical structures can be a cable attached to the enclosure, items near the circuit, a part of the metal chassis, a slot in the chassis or a portion of one of the circuit boards in the system. Knowing how to control these structures so they are not capable of supporting resonance and radiation is the key to success.

This two-hour course will discuss and define

• Determining max frequency of a system
• Antenna “in” and “on” PCBs and enclosures
• Metal vs. plastic enclosures and shielding of circuits
• Impact of slots and openings in enclosures
• Impact of component placement and PCB shape
• Extreme importance of I/O connector placement
• Correct shielding of I/O cables.

Analog sensors are in constant use, measuring the physical world as electrical data that is digitized and used to understand, optimize, and innovate. If analog engineering is allowed to become an afterthought in a world focused on IoT and digital interconnectivity, sensor data quality and reliability will become the performance-limiting “weakest link.” Whether reading pressure and temperature in piping at an industrial plant, optically sensing blood composition in a hospital, or providing motion feedback in robotics, every industry relies on these analog sensors.

Maybe you’ve wondered:

• Should I use an RTD or an NTC or a thermocouple?
• Should a 4-20mA circuit use 2, 3, or 4 wires?
• Should I use 4-20mA, 0-5V, mV/V, SPI, I2C, or RS-485?
• Will a sensor need additional electronics or will it work out of the box?
• What circuits, components, and PCB designs work best to interface with the many different types of sensors?
• Will my sensor work in an electrically noisy environment and how can I adjust board layout to improve my noise floor?

This session will provide the information to select and integrate analog sensors into new or existing PCB designs. Attendees will gain knowledge of how common analog sensors work, common types of these devices, their potential applications, and a breakdown comparison of the many sensor options.

Additionally, attendees will walk away with example circuits to interface with various sensors and learn best practices in PCB design to ensure high quality data capture. With a better understanding of where our digital data comes from, engineers, PCB designers, and leadership can make informed decisions to get the best sensor and the correct PCB design for the job at hand.

As printed circuit boards become more complex, so do the stackups. Some stackups require specialized materials and multiple drill cycles during manufacturing. This two-hour presentation gives engineers training on current industry standards and practices for stackups and impedances.

What we cover:

• Insight to PCB materials
• Stackup manufacturing process
• Simple and complex stackups
• Stackup design tips
• Designing stackups with impedance traces (introduction to impedance traces, impedance structures, and specifications)
• How materials and impedance traces work together to produce the specified impedance value
• Impedance design tips for better signal integrity.

Designing complex PCBs is a multifaceted and challenging task that plays a pivotal role in the development of advanced electronic systems. This presentation explores the key considerations, methodologies, and emerging trends in the field of complex PCB design. The complexity of modern electronic devices demands intricate PCB layouts to accommodate high-density components, diverse functionalities, and stringent performance requirements. We will delve into the critical aspects of layout solvability, signal integrity and electromagnetic interference, power integrity and power distribution, thermal management, and manufacturability, emphasizing the need for a holistic and systematic approach.

We will also address the incorporation of EDA tools to enhance the efficiency and reliability of complex PCBs. As the demand for smaller form factors and increased functionality rises, designers face the challenge of optimizing space utilization while minimizing electromagnetic interference and signal crosstalk. We will explore strategies for mitigating these challenges, including the use of automation in placement and routing to include simulation and DfM tools.

Furthermore, we will discuss the role of collaboration between hardware and software teams in achieving successful complex PCB designs. The integration of design for manufacturability (DfM) and design for testability (DfT) principles is highlighted as essential for streamlining the production process and ensuring reliability of the final product. The evolution of Industry 4.0 and the Internet of Things (IoT) introduces new dimensions to complex PCB design, with considerations for connectivity, security and adaptability becoming increasingly important.

In conclusion, this presentation provides a comprehensive overview of the challenges and strategies involved in designing complex PCBs, emphasizing the interdisciplinary nature of the task and the need for a holistic design approach.

What you will learn:

1. The three key perspectives of success in PCB design
2. Increase productivity and proficiency with current/future EDA software (automation)
3. Benefits of implementing best practices and the cost of doing nothing (remaining status quo).

In today’s rapidly evolving design landscape, engineers and designers face the challenge of delivering high-quality results efficiently. This seminar offers attendees actionable insights and practical examples to enhance their design processes, ultimately leading to improved project outcomes and reduced time spent on circuit, component, and layout knowledge acquisition.

Our seminar will delve into three key areas:

• Project foresight for proactive decision-making
• Leveraging multi-channel/multi-project design reuse for efficiency
• Ensuring identical characterization throughout the development cycle for consistency.

We will cover a range of essential topics, including:

• Efficient component and library creation for future and multi-project use
• Simplifying schematic accessibility and reducing complexity
• Strategies for effective printed circuit schematic and layout design, with an emphasis on verification and debugging
• Procedural interactions that contribute to project success.

Attendees will leave with a toolkit for achieving design success, including:

• Real-world design examples and experience with various project states
• Methods for streamlining the verification and debugging processes
• Insights into collaborative, multi-user perspectives that can enhance project outcomes.

Join to unlock the potential of your design process and take your projects to the next level.

Everyone talks about signal integrity in PCBs, but few circuit boards operate without external wiring. Whether it’s as simple as power wiring, as complicated as high-speed differential pairs or even worse, non-differential pairs, there are good and bad ways to use the connectors and cables available to us today.

This class will show how connectors and cables relate to signal integrity concepts:

• How does the energy flow in the wiring?
• What determines impedance in non-impedance-controlled wiring?
• How many grounds do I need in the cable/connector?
• How do I pick connectors?

It will go over practical examples showing the tradeoffs (since nothing is completely ideal). This class will shed new light on how we can apply the same signal integrity rules to wires and cabling as we do PCB layout.

With the rapid development of artificial intelligence and autonomous driving technology, miniaturization, integration, and modularization are the general trend of electronic product design, especially in chip power supply. Designers are looking for higher efficiency, higher power density, better reliability, and smaller package sizes.

The inductors of tertiary power modules that power CPUs and GPUs usually occupy a large surface area, making it challenging to deploy more chips and small-sized resistors and capacitors. Thanks to the development of copper-iron co-firing integrated inductor technology, inductors can be embedded into the PCB and copper plating makes connections and fanouts. In some ways, it is the first packaging by PCB embedded technology, which can solve this problem well.

This talk will focus on the advantages of inductor embedded PCBs, key manufacturing technologies, reliability test, design rules, and typical product shows.

In the dynamic realm of electronics, completing a PCB layout is just the tip of the iceberg. The real challenge lies in seamlessly signing off the design and generating the manufacturing release. The significance of having comprehensive documentation, thorough checklists, and strategic review meetings before any design release cannot be overstated.

In the fast-paced world of technology, where time to market is a decisive factor in product success, hasty design releases can prove to be detrimental. Organizations often face nightmares when crucial elements are overlooked. History provides cautionary tales, such as the downfall of giants like Kodak and RIM (Blackberry phones), underscoring the importance of timely product launches.

This session will explore the importance of comprehensive documentation, checklists, and thorough review meetings prior to design release.

Fan out and routing of today’s BGAs can be quite challenging! With the overall size of the parts increasing and the pitch between pads decreasing, it can be extremely difficult to get all the signals (and powers) into or out of the part at all, and especially without using many, many layers of the PCB.

If the designer uses creativity to set up patterns of signals and vias, the fanout can be completed for all the signals, while using the layers of the board efficiently. The signals will also need to maintain a good return path, signal integrity and EMI control, which complicates things more. These issues can be addressed with some thought and preparation that we will discuss. Additionally, there are manufacturing concerns that are unique to the newer BGAs because of their small pad sizes, the trace widths needed, and the small capacitors used.

This presentation will discuss:

• Signals and via patterns
• Fanout completion
• Signal return paths
• Signal integrity and EMI control
• Manufacturing concerns unique to newer BGAs
• Choosing effective BGAs
• Cap placement
• Power and stackup information
• Grid systems for through hole and microvia fanout.

Many engineers believe the cost of the bare PCBs and assemblies is purely a function of board size, thickness, number of layers, spacing between features, etc. Part of that is true, but many other factors drive cost and reliability. Even more important, many PCB design issues determine the quality of bare boards and assemblies, such as “where” the copper is located as well as copper density, parts placements, how the board is routed, balanced PCB stack-up, feature sizes, etc.

This course discusses and defines:

• Copper density, balance, location, PCB stack-up, etc.
• Cost impact of PCB size and shape vs. fabrication panel sizes
• The many PCB feature shapes and sizes vs. copper weight, thickness, etc.
• Design methods to minimize cost-adders to the bare board and assembly
• Understanding design for manufacturability at all levels
• How to avoid design modifications from fab and assembly houses
• Associated IPC standards and specifications.