9:00 a.m. to 10:00 a.m.
1. PCEA Annual Meeting
Speaker: Stephen Chavez, Siemens

Come learn about the Printed Circuit Engineering Association, an international network of engineers, designers, and anyone related to printed circuit development. Its mission is to promote printed circuit engineering as a profession and to encourage, facilitate, and promote the exchange of information and the integration of new design concepts through communications, seminars, workshops, and professional certification through a network of local and regional PCEA-affiliated groups.

Who should attend: PCB Designer/Design Engineer, System Designer, Fabricator Engineer/Operator, Assembly Engineer/Operator, Sales/Marketing
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 12:00 p.m.
2. Principles of Building a PCB Stackup
Speaker: Susy Webb, Design Science

The stackup of a printed circuit board is one of the most important parts of the design layout. It affects the way the signals flow on the board, so it can affect many other aspects of the functioning board, like impedance control, return current and the amount of crosstalk, common mode currents, and displacement currents. In today’s higher-speed designs, it is critical to do this step well. We will discuss what is needed for a good stackup, and the routing thereon, both from an electronic and a manufacturing perspective.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 12:00 p.m.
3. Improving Circuit Design and Layout for Accessibility and Success
Speaker: Tomas Chester, Chester Electronic Designs

With this seminar, attendees will be given details and examples of additional information that can be embedded within their existing design process. This content is aimed at improving the successful outcome of their design and reducing the time spent acquiring circuit, component, or layout knowledge. Whether you are a solo designer or an engineer within a large team, these design additions will enable participants to look beyond their own immediate workflow and improve the project design process.

The seminar will focus on:

  • Project foresight
  • Multi-channel/multi-project design reuse
  • Identical characterization during the entire development cycle.

The following topics will be covered:

  • Component/library creation for future/multi-project use
  • Schematic accessibility and complexity reduction
  • Printed circuit schematic and layout design strategies for verification and debug
  • Procedural interactions of a successful project.

Attendees will gain methods for improving design success:

  • Design examples and experience interacting with various project states
  • Methods for reducing verification and debug cycles
  • Multi-user interactive perspectives.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Test Engineer, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 12:00 p.m.
4. Avoiding PCB Respins, Reducing Cost and Time to Market
Speaker: Syed Ubaid Ali Warsi, Wavetroniks

How often does it happen that we receive a schematic from the electrical engineer and the PCB layout starts in haste? Weeks of effort are spent and the layout completed based on our own understanding, but during the final review we realize the design doesn’t comply with the fundamental requirements, as they were never properly conveyed and documented. What now? It’s time for frustration and probably a design respin. This scenario can become worse if the issues are raised after fabrication and assembly.

Ever-increasing rising and falling clock edges of an IC demand an innovative and smart design approach rather than a conventional approach. In this session, we’ll discuss the best practices/standard operating procedure to overcome this situation effectively and efficiently.

What You Will Learn:

  1. The collaborative approach to involve the major stakeholders early in the design phase.
  2. What kind of documents and meetings are needed before kicking off the PCB layout.
  3. How to acquire and document the mechanical requirements.
  4. How to ask the EE to make the system block diagram effective and meaningful for the PCB designer.
  5. How to understand the electrical side of the design and incorporate those insights into the layout.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 12:00 p.m.
5. Mixed Signal Noise Sources and Solutions
Speaker: Keven Coates, Fluidity Technologies

Have you ever had a noise-sensitive circuit and tried to find the noise source? Even after you completely encased sensitive portions in all sorts of shielding, you still had noise? It’s very possible this is magnetic or low frequency noise. Lower frequency fields can’t be contained and shielded against in the same way high frequency electric fields can. In this presentation, hear about the author’s nine-month long battle with a specific noise issue, the best tools to fight it, twisted pair, current loops, and the best ways to test for and defeat low frequency noise in your designs.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 11:00 a.m.

6. Benefits of Signal and Power Simulations for PCB DDR Traces

Speaker: Ramon Angelo Martin Lardizabal, Analog Devices

Double data rate (DDR) traces are widely used in a lot of PCBs that require fast data transfer in memory circuits. Depending on the performance of these traces they are categorized on the industry standard set by JEDEC. The challenge for PCB designers is how they can implement these standards on their boards without the risk of having to redesign them. The use of PCB simulation software can help detect these potential failures on the board prior to fabrication. This allows the company to not only save cost by avoiding refabrication of the boards, but time as well since there will be less time spent debugging and redesigning. Depending on how thorough the set up for the simulation is, the more accurate the results will be to the actual performance of the board. Although there is a higher initial cost in training PCB designers to use simulation software, the end goal of being able to consistently release boards that perform as designed outweighs that.

Who should attend: PCB Designer/Design Engineer
Target audience: Beginner, Intermediate
10:00 a.m. to 5:00 p.m.
7. Power Delivery System (PDS) Design
Speaker: Lee Ritchey, Speeding Edge

Today’s high-speed designs use a variety of power delivery components, and successfully designing a PDS and the PCB into which it is incorporated requires a thorough understanding of the overall power delivery system. In addition to reviewing the PDS components currently available, this course examines how to meet the conflicting goals of the PDS system and how to address power plane impedance and overall system capacitance issues.

This PDS design class is structured to take the student through the entire PDS design process. The class begins with the goals of the PDS design process, including how to arrive at a reliable design in the shortest amount of time and at the lowest cost possible with a minimal use of single-source suppliers and specialty components and materials. The course will also examine several real-world PDS designs to further illustrate the goals of the design process.

The materials and examples used in this course are drawn from actual designs of PDS systems in current manufacture. These examples range from subminiature disc drives to terabit routers and supercomputers. The design process presented is based on many years of completing designs that are “right the first time.” The goal of the course is for students to take the information learned in class and start applying it immediately to troubleshoot existing designs or incorporate into next-generation product iterations.

Note: This is a 5.5-hour class. There is a break at the two-hour mark.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer, Fabricator Engineer/Operator
Target audience: Intermediate, Advanced
11:00 a.m. to 12:00 p.m.
8. Sintered Vias for HDI PCB Design
Speaker: Sean Ernest Clyde Nodado, Analog Devices

The high aspect ratio is one of the challenges that designers encounter when designing HDI PCBs. Breaking and interconnecting high-layer-count PCBs using conductive sintered paste solves the current dilemma. This presentation aims to evaluate the signal integrity of sintered vias through ADS simulation and actual measurements. Sintered blind vias on PCBs were designed to verify the results. With the increasing PCB design trends and complexity, sintering methods are a viable solution for enabling low-cost, high-performance HDI PCB designs.

Who should attend: PCB Designer/Design Engineer, Hardware Engineer, SI Engineer, Fabricator Engineer/Operator

Target audience: Intermediate
12:00 p.m. to 1:00 p.m.
Free Lunch-and-Learn for Conference Registrants
sponsored by Polar Instruments
1:30 p.m. to 3:30 p.m.
9. Signal Integrity in Thin PCB Materials
Speaker: Zachariah Peterson, Northwest Engineering Solutions

HDI and UHDI designs push the limits on layer thickness in conventional materials. Thinner low-Dk materials have also enabled much higher layer counts without HDI manufacturing requirements, but the impacts on SI, PI, and EMI are not always understood. Due to the interplay between line width, allowable line spacing from an SI perspective, Dk value, and layer thickness, it is important to understand how signal behavior is altered when designs are pushed into thinner materials.

This presentation will present the design practices that are possible in thinner materials, how SI/PI are affected in thinner materials, and:

  • Why is there a trend towards lower Dk?
  • What linewidth/spacing densities do thin materials enable?
  • Understanding tradeoffs between low Dk and low layer thickness
  • How these results compare for single-ended/RF nets vs. differential nets
  • Thick low-Dk materials vs. thin moderate-Dk materials
  • Thin materials for power/ground plane pairs vs. materials for signal layers.

First principles governing signal dynamics in thin layers will be presented, and simulation examples from real designs will be presented to illustrate the design tradeoffs and possibilities presented above. Designers will learn how to balance tradeoffs between Dk value, Df value, copper roughness, and laminate thickness when selecting stackup materials.

Who should attend: PCB Designer/Design Engineer, SI Engineer, Test Engineer
Target audience: Intermediate, Advanced
1:30 p.m. to 3:30 p.m.
PCB DfM (A Comedy Routine Depicting a Typical Dialogue between a PCB Designer and Fabricator)
Speakers: Stephen Chavez, Siemens, and Gerry Partida, Summit Interconnect

PCB designers just don’t simply connect the dots or push the magic button, as some may suggest. They design complex PCBs that contain physical packages smaller than ever before while addressing electrical, mechanical, and thermal variables and cost. Success in PCB design means knowing and understanding what you are doing and how the decisions you make and implement upstream have downstream ramifications.

There are key factors in achieving success in PCB design. In this presentation, the speakers focus on the relationship between design and fabrication. We’ll discuss industry best practices within the design to fabrication process, along with the pros and cons that affect ROI when best practice recipes are implemented and when they are not implemented (the cost of doing nothing).

With today’s EDA tools, and eagerness of suppliers offering their technical support, the potential for success is higher than ever. This collaborative approach makes a positive difference in getting it right the first time, reducing respins (cost), increasing yields, and ultimately getting to market faster.

What You Will Learn:
• Increase productivity and proficiency in PCB design to fab
• Capitalize on existing industry best practices of DfM and manufacturing outputs
• How you can reduce cost
• A short comedy scenario depicting the dialogue between a principal PCB designer and a fabricator
.

Who should attend: PCB Designer/Design Engineer, System Engineer, Hardware Engineer, SI Engineer, Test Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
1:30 p.m. to 3:30 p.m.
10. Ask the Flexperts with Lessons Learned
Speakers: Mark Finstad, Flexible Circuit Technologies, and Nick Koop, TTM Technologies

This course will cover the entire gamut of flexible and rigid-flex circuits from two of the most recognized names in the flexible circuit industry: Mark Finstad (co-chair of IPC-2223) and Nick Koop (co-chair of IPC-6013). Topics covered will include mechanical design/material selection, cost drivers, bending and forming concerns, testing, and issues unique to rigid-flex. This course also includes a complete virtual plant tour of a flexible circuit manufacturing facility to help attendees understand the manufacturing processes. Throughout the presentation, the instructors will share real-life stories of flexible circuit applications gained over 35+ years in the industry. Some are success stories, others not so much, but all provide excellent lessons learned. The instructors also welcome and encourage questions and enjoy wandering off-course with lively interactive discussions on specific topics from the class.

Who should attend: PCB Designer/Design Engineer, System Designer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Intermediate, Advanced
1:30 p.m. to 5:00 p.m.
11. Parts Placement Choices and Consequences
Speaker: Susy Webb, Design Science

There are many ways to place parts on any board, but some work much better for physics, electrical and mechanical purposes. If a new board works electrically but won’t interface properly with the rest of its system, it may require costly and time-consuming redesign and retesting. Designers must understand the board, electrical and system needs, as well as typical placement and routing guidelines and the consequences of not adhering to them. When the reasoning and effects they have on one another are understood, designers will intuitively make good decisions for their board designs and avoid problems. In this presentation, we will discuss choosing effective parts, approximate order of overall placement, placement to set up routing, board and system consequences, manufacturability, and more.

Who should attend: PCB Designer/Design Engineer, Hardware Engineer
Target audience: Intermediate
1:30 p.m. to 5:00 p.m.
12. Circuit Grounding to Control Noise and EMI
Speaker: Rick Hartley, RHartley Enterprises

When time-varying (AC) signals travel in the transmission lines of a board, state-changing electric and magnetic fields are present. These fields, when not controlled, are the source of noise and EMI. In recent years, ICs with very fast rise time outputs have made problems common, even in circuits clocked at low frequencies. Knowing all the basics of proper grounding will help contain and control fields, making noise and EMI issues virtually nonexistent.

This 3.5-hour course will focus on the issues PCB designers and engineers need to know to prevent noise, EMI and grounding problems in today’s circuits.

We will discuss:

  • What is meant by “grounding,”
  • Where energy travels in the board, location of high- and low-frequency currents,
  • Keys to controlling common mode EMI, cables and other unintended radiators,
  • Effects of IC style and packaging on overall grounding, Impact of connector pin-out,
  • Best locations for IO connectors,
  • Divided planes and plane islands in the PCB,
  • Routing to control noise,
  • Best board stack-ups, and
  • Filtering of single-ended and differential I/O lines.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
1:30 p.m. to 5:00 p.m.
13. PCB Design for High Reliability
Speaker: Paul Cooke, Ventec

Designing printed circuit boards (PCB) and assemblies is more difficult than ever due to complexity, component availability, thermal requirements, signal integrity, material selection, layer counts, harsh environments and increased functionality all required in smaller form factors. We will look at all the elements to successfully design a PCB that can meet all the designers’ requirements and perform to the customer and industry standards as well as survive in today’s harsh environments. We will look at everything from materials to surface finishes and testing to ensure the product is robust as possible with a high level of confidence that it has been designed for extended life in the field.

Who should attend: PCB Designer/Design Engineer, Hardware Engineer, Test Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
3:30 p.m. to 5:30 p.m.
14. Design with the End in Mind: Using System Level Simulation to Reduce PCB Field Failures
Speaker: Harry Kennedy Jr., Altair

As a PCB designer, creating longevity for your designs is a skill that differentiates you from your peers. It’s easy to prototype and build a PCB in a lab, but how can you start to prepare for the system your PCB will be a part of? Are there things you can do to prepare for the end application and conditions your board will face?

It’s hard to account for every use case of a PCB during design, but it’s important to know what the main functions of the PCB will be and how to design the board according to this. If your design will be in a compact enclosure, is the heat sink you’ve used before optimal for this design? Do you need to move components around to better manage heat when in the customer’s hands? These are thoughts a designer must consider early in the design process to reduce the number of times a board must be redesigned. If your PCB will be in a car or industrial end equipment, have you considered the effects of solder fatigue on the silicon packaging you chose? It might have been easier to use QFN package type, but what if solder fatigue analysis could have told you to design using a QFP for better product reliability? Learning the requirements from your system engineer will help, but there are also ways to use simulation to make data driven decisions about your design.

This session will focus on the ways PCBs fail after manufacturing. We will investigate quality issues linked to assembly, adding an enclosure, and even using the PCB in the field. We will also show some examples of how to simulate the effects of field use to better design your PCBs. Finally, we will talk about how to better include the system engineers and mechanical engineers in the design review process to create a better final product.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Test Engineer, Assembly Engineer/Operator
Target audience: Beginner, Intermediate
10:00 a.m. to 12:00 p.m.
15. Heat Management Strategies through Better Layout
Speaker: Syed Ubaid Ali Warsi, Wavetroniks

With continuous technology developments, electronic circuits are not only getting faster and smaller, but also more power hungry. As a consequence, related thermal issues are more prevalent than ever, because most PCBs these days comprise a number of high-power components such as high-performance processors, transceivers, MOSFETs, high power LEDs, etc., causing excessive heat. Furthermore, power conversion circuitry such as DC-DC converters and regulators are major culprits behind temperature rise and hotspots. Besides the components, resistance of the electrical connections, copper traces and vias contribute to heat and power losses.

Thermal stress is one of the main causes of circuit malfunctioning, as it leads to a degradation of performance or even a possible malfunction or failure of the system. To combat thermal stresses at layout level, PCB designers need to incorporate effective techniques to reduce the impact of heating, such as careful selection of material, component selection, placement, power ground plane construction, thermal vias and a lot more. We’ll learn all these effective strategies and tricks that a layout engineer can adopt to identify and mitigate major hotspots to improve thermal performance of PCBs.

Who should attend: PCB Designer/Design Engineer, Hardware Engineer
Target audience: Beginner, Intermediate
10:00 a.m. to 12:00 p.m.
16. What to Do When Everything Goes Wrong
Speaker: Ryan Roberts, Wavetronix

As engineers, we get to solve problems! The projects we work on will have design requirements that go against design best practices. Mechanical, marketing, and cost constraints restrict designs, requiring innovative thinking to make the product work. Often, prototypes won’t work despite our best efforts. These are the problems that challenge us and make our work interesting.

This presentation will help to improve the communication, planning and technical skills needed to deal with design problems as they arise. In this presentation, we will discuss how communication is one of our best tools for resolving technical problems. We will learn about planning for projects, and for resolving issues. We will look at the tools, such as simulation software and design rules, that help us to avoid pitfalls and streamline the design process. We will also cover some troubleshooting recommendations for common problems such as radiated emissions, crosstalk, power supply failures, processor boot-up problems, and manufacturing defects.

Who should attend: 
Target audience: 
10:00 a.m. to 12:00 p.m
17. Cables and Connectors: Design for Signal Integrity (Will They Work?) and EMI
Speaker: Keven Coates, Fluidity Technologies

Everyone talks about signal integrity in PCBs, but few circuit boards operate without external wiring. Whether it’s as simple as power wiring, as complicated as high-speed differential pairs, or even worse, non-differential pairs, there are good and bad ways to use the connectors and cables available to us today. This class will show how connectors and cables relate to basic SI concepts. How does the energy flow in the wiring? What determines impedance? How many grounds do I need in the cable? How do I pick connectors? I will go over practical examples showing the tradeoffs, since nothing is completely ideal. This class will shed new light on how we can apply the same signal integrity rules for other things to wires and cabling.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 5:00 p.m.
18. Getting to 56 Gb/s
Speaker: Lee Ritchey, Speeding Edge

This course covers all the technical issues involved in the design of very high-speed differential pair signal paths. This is a thorough treatment of the topics to consider to be successful as the speeds of differential pair signal paths increase. 56Gb/s signaling is being shipped in high-performance servers, routers and switches. When data rates exceed 56Gb/s, a number of areas need to be managed that were not significant issues at lower data rates. Among these are the type of glass weave used in laminates, the surface finish on the copper used for signal layers and the loss characteristics of the laminate itself. Effects of vias and other drilled holes can have a significant effect on signal quality if not properly managed. This course will draw on more than 30 test PCBs built to determine the properties of new laminate systems as well as to measure the effects of vias, plane crossings and other features that might affect high speed signals.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, IC Packaging Engineer, SI Engineer, Test Engineer, Fabricator Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
11:00 a.m. to 12:00 p.m.
F4. Keynote
12:00 p.m. to 1:00 p.m.
Free Lunch on Show Floor, Sponsored by Sierra Circuits
1:30 p.m. to 3:30 p.m.
19. From DC to AC – Power Integrity and Decoupling Primer for PCB Designers, Situation Today and Outlook for the Future
Speaker: Ralf Bruening, Zuken

Today, supply voltages decrease with every new silicon generation, contributing as well to the goal of reducing power consumption of electronics. This and the resulting shrinking noise margins for these ICs define increasing demands for the quality and stability of power distribution systems of the PCBs. Shrinking form factors with decreasing board real estate (e.g., IoT devices) and emerging technologies (e.g., autonomous driving, advanced communication units) add fuel to the fire. Hence tighter requirements and constraints from silicon vendors are defined for the power distribution networks (PDN) PCB designers have to follow and implement in conjunction with tighter decoupling schemes. Application-dependent restrictions (e.g., discrete package allowance in automotive) and stringent cost and quality demands further complicate the game.

In this two-hour workshop, the requirements and the basics of PCB power distribution systems are explained in detail. Plate capacitance, loop inductances and cavity resonance are explained without deep math. Side effects to the signal integrity (SI) and EMC behavior of board structures are discussed using illustrated practical examples. The role of decoupling capacitors and their evolution in recent years are a major part of the workshop. Guidelines for a first order covering and resolving power integrity issues are given regardless of the used PCB design and ECAD process. Simulation capabilities addressing power integrity (PI) during PCB design will be explained and demonstrated by animated slides in a generic, vendor-neutral manner as one powerful problem-solving approach for PI issues. Silicon vendor support documents (e.g., design guidelines, constraint documents, reference designs or spreadsheet tools) to address power integrity are introduced and discussed. Examples from various industries (e.g., automotive) will complement the session with practical application experience.

Who should attend: PCB Designer/Design Engineer, Hardware Engineer, SI Engineer, Fabricator Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
1:30 p.m. to 3:30 p.m.
20. Avoiding Assembly Pitfalls- My DFA Lessons Learned on Small PCB Runs
Speaker: Keven Coates, Fluidity Technologies

New system designs often have a 33% fail rate! Learn how to make that significantly better through parts placement, orientation, and knowledge of the assembly process. This class is less about PCBs and more about learning to work with assembly shop practices and understanding the assembly process. This class is based on the presenter’s experience as the EE in charge of working with the in-house assembly operation to increase yield. Design for assembly (DfA) is crucial to improving first runs and getting them to production-friendly yields.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Test Engineer, Assembly Engineer/Operator
Target audience: Beginner, Intermediate
1:30 p.m. to 5:00 p.m.
21. Signals Flowing through a PCB
Speaker: Susy Webb, Design Science

When designing a PCB, the way the signals flow is critical to proper circuit function. Routing cannot be performed as a random connecting-the-dots methodology, but must be carefully thought out as to what layer the signals are on, where they go when they change layers, and how the return energy will get back to the source. The first thing this presentation discusses is the physics of how the signal and its return energy flows within the structure of a board, and the planning that is needed. Then, we discuss how to control that energy to avoid interference by the way the signals and busses are placed. That will include discussing the damage that can be caused to signals by poor routing of noisy signals, poor placement and routing of buses, poor spacing between signals, or poor routing such as crossing splits in return planes. Finally, we will discuss some stackup ideas for best containment and control of the energy.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
5:00 p.m. to 6:00 p.m.
Evening Reception on Show Floor, Sponsored by EMA Design Automation and Ultra Librarian
9:00 a.m. to 10:00 a.m.
F1. Panel: Next-Generation Engineers

Moderator: Phil Marcoux, Score.org

What is happening in the industry today – and just as important, what is coming tomorrow? Interact with our panel of seers as they attempt to divine what’s in store for the entire electronics design to assembly supply chain.

Panelists:

  • Steven Clark, Ph.D., Stanford
  • David McFeely, San Jose State University
  • John Watson, Altium and Palomar College
  • Andrew Williams, PRIDE Industries
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator, CEO/COO/Sales/Marketing
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 11:00 a.m.
F2. Novel Embedded Trace Technology

Speaker: Laurent Nicolet, Schmid Systems

ET is a novel process capable of covering the need for the actual and future demand of substrate and high-end PCBs. The achieved results show a high potential for massive improvements in future board design like a considerable increase in the mass of copper within the PCB, no limitation for the geometry and the quantity of holes, and implementing 3-D designs.

These technology advantages are coming along with a new production tool generation, including a “smartfab” concept to achieve savings on energy, chemistry, water and emissions. The presentation will emphasize the design knowledge needed to implement the novel process.

Who should attend: PCB Designer/Design Engineer, System Designer, CEO/COO/Sales/Marketing
Target audience: Advanced
10:00 a.m. to 11:00 a.m.
F3. Transforming PCBA Visual Inspection through Generative AI
Speaker: Gary Pacheco, DarwinAI

The rise of generative artificial intelligence – the technology at the heart of ChatGPT – has disrupted numerous industries including our own. In this talk, DarwinAI CTO Gary Pacheco will provide a compelling overview of the power of generative AI (along with its “regular” variant) to improve the visual inspection of PCBAs.  Key topics include rapid product configuration, vastly reduced programming time, data efficiency, continuous and dynamic learning, and reducing hardware cost and complexity.

Who should attend: Hardware Engineer, Assembly Engineer/Operator, CEO/COO/Sales/Marketing
Target audience: Beginner, Intermediate, Advanced
11:00 a.m. to 12:00 p.m.
F4. Keynote: Revolutionizing Electronics Cyber-Physical Systems: Unleashing the Power of MBSE and AI for Electronics System Design,
Speaker: Louis Feinstein, Dassault Systemes
 
Witness the next paradigm in Electronics Cyber-Physical Systems (ECPS) development. 

By leveraging model-based systems engineering (MBSE) and artificial intelligence (AI), we accelerate the design of electrical and electronic systems. MBSE streamlines integration, while AI-driven optimization ensures alignment with design intent and derived requirements. The synergy of MBSE and AI empowers efficient ECPS development, establishing new benchmarks in quality and speed. A use case will be showcased to validate the approach, paving the way for the future of ECPS.

12:00 p.m. to 1:00 p.m.
Free Lunch on Show Floor, sponsored by Sierra Circuits
1:30 p.m. to 2:30 p.m.
F5. Reverse Engineering PCBs: How to Recreate a Lost Design
Speaker: Ethan Pierce, Pierce Design

Maintaining a product is very difficult when:

  • The source files aren’t available
  • Only Gerber files and maintenance documents are available
  • Making a revision to a company-owned product with no source files.

This webinar presents a skillset to technicians, designers and engineers that leverages assembled PCBs without design data to be recovered and recreated. Often, end-of-life or existing systems have design data that are lost, abandoned or of unknown origin, a rising concern among teams building or maintaining these systems. Using a set of software- and hardware-agnostic processes, this course analyzes a design of unknown origin and recreates that design with a set of commonly available tools. Once equipped with this skillset, attendees will have the knowledge to recreate and recover lost or unavailable design data on current and future projects.

The course will introduce:

  • Basic reverse-engineering techniques with benchtop test equipment
  • Reworking and testing techniques
  • Identifying PCB structures
  • Identifying components
  • Using photography and image manipulation tools
  • Migrating the design into a generic ECAD tool.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer
Target audience: Beginner, Intermediate
2:30 p.m. to 3:30 p.m.
F6. Panel: AI in Electronics: What Can We Expect?
Moderator: Louis Feinstein, Dassault Systemes

Artificial intelligence has made its way into ECAD and other software used in electronics manufacturing. But what’s the actual intelligence in these tools? CTOs of major tool makers discuss the future of AI. We are inviting the CTOs and related domain experts from a handful of ECAD companies to participate. This is intended to give a snapshot of where we are, what’s feasible, and the forecasted timeline for implementation.

  • Tomide Adesanmi, Circuit Mind
  • Michael Jackson, Ph.D., Cadence
  • Kyle Miller, Ph.D., Zuken
  • Sebastian Schaal, Luminovo
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
3:30 p.m. to 4:30 p.m.
F7. Ultra-High Density Interconnects- A New Horizon for North American Manufacturing
Speaker: John Johnson, American Standard Circuits

This presentation will discuss ultra-high-density interconnects from a board fabricator’s perspective. Covered will be the technology approach and manufacturing processes used to manufacture ultra-high-density interconnects with 25 micron and smaller line width/spacing. Design approaches to minimize complexity, increase reliability and areas of concern in use of various design solutions will be presented.

The attendee will leave with a better understanding of how to use ultra-high-density interconnects, work with their fabricator on design approaches, and knowledge of processing techniques.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
5:00 p.m. to 6:00 p.m.
Evening Reception on Show Floor, Sponsored by EMA Design Automation and Ultra Librarian
 
 
10:00 a.m. to 12:00 p.m.
24. PCB Layout of Switch Mode Power Supplies
Speaker: Rick Hartley, RHartley Enterprises

When executing PCB layout, we tend to treat digital circuits differently from analog circuits. Each has its own critical requirements. Switch mode power supplies are another wrinkle altogether, and usually need to be treated differently from either. All switch mode power supplies have four to five circuit loops, all of which are important, but a couple of these loops are downright critical in terms of PCB layout. An improperly designed switch mode supply will often not function as intended, and in some cases will not function at all. In contrast, understanding what makes up a switcher circuit and knowing how to take care of the loops during board layout will permit these supplies to operate flawlessly with very high efficiency.
This two-hour course will outline the difference between switchers and series-regulated power supplies, the different types of switcher circuits (buck, boost, etc.), basic theory of operation of switcher circuits and the impact of the various components, definition and behavior of the five loops, layout to isolate loops from one another, minimize voltage drop, and control current paths, layout to minimize noise and EMI, effect of paralleling output capacitors and proper grounding technique.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 6:00 p.m.
25. PCB Antennas Augmented
Speaker: Ben Jordan, JordanDSP

It’s more important than ever to extend your PCB design skills beyond digital circuits. Besides, the broader your design domain skills, the more you can get paid.

This tutorial is on the principles, analysis, design and use of PCB antenna structures as well as off-the-shelf antenna components. It is for any PCB designer who wants to improve their skill and confidence in understanding and designing boards with integrated and discrete antennas for any application.

The learning objectives are to give attendees:

  • A more intuitive, visual understanding of the physics by which PCB antennas operate
  • The confidence to say “yes” to designing high-frequency PCB layouts, particularly involving antennas
  • The skills to design the most popular types of PCB antennas
  • Access to free tools that will accelerate the design process and assist with modeling
  • The techniques most frequently used for impedance matching, tuning, and arraying
  • Knowledge for choosing the best type of antenna for a given purpose or design situation.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer
Target audience: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer
10:00 a.m. to 6:00 p.m.
26. Stackups: The Design Within the Design
Speaker: Bill Hargin, Z-zero

This workshop will guide design teams through the process of evaluating and selecting the right laminate for a design, creating PCB stackups that meet the requirements of complex, multilayer boards that work right the first time, within budget, and with reproducible results across multiple fabricators. The course will go into detail on tradeoffs between loss and cost, including dielectric loss, resistive loss, surface roughness, as well as glass-weave skew. After attending this course, students will be knowledgeable of PCB laminate tradeoffs, the laminate-materials market, and the process of troubleshooting problematic stackup designs. Attendees will also be exposed to cost-effective strategies for controlling loss and glass-weave skew.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Fabricator Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 6:00 p.m.
27. How PCB Design Requirements Affect Fabrication
Speaker: Paul Cooke, Ventec

This course will walk the audience through the entire multilayer PCB fabrication process, making stops along the way to explain how PCB design requirements affect the numerous fabrication steps and if/how the finished product can meet the intended quality and reliability requirements. A detailed explanation will be given for each of the process steps and how that step affects quality and reliability. Design requirements will be discussed, with an explanation of the dos and don’ts of how they affect fabrication and impact yields. Process controls adopted by the fabricator to ensure maximum yields and quality are maintained during each step of fabrication will also be covered, as well as the pros and cons of variables available to the designer: solder mask, surface finish, materials selection, copper weights, feature size, etc. The course also looks at fabrication drawing specifications and how they can affect yield, cost, quality and reliability.

Who should attend: PCB Designer/Design Engineer, Hardware Engineer, SI Engineer, Fabricator Engineer/Operator
Target audience: Intermediate, Advanced
10:00 a.m. to 6:00 p.m.
28. A Walk-Through of Practical Embedded System Design
Speaker: Christopher Young, Young Engineering Services

A practical design walkthrough of an embedded system, drawing real life examples from a multi-purpose IO expander/data concentrator product design. The walkthrough will address multi-business level approaches (corporate/enterprise, small business, entrepreneur) and will be biased toward PCB design.

The presentation material will be broken down into four phases:

  1. Requirements hierarchy, system requirements, and high-level effort/schedule estimations.
    • How to define a hierarchy, write effective system requirements, and develop practical estimations.
    • Why PCB designers should care enough to get involved, how to get involved and stay involved.
  2. System design, HW/SW/TEST requirements generation, and effort/schedule refinement.
    • How to develop effective HW/SW/TEST requirements from a system design.
    • How to embed PCB design practices into the requirements.
  3. HW/SW design, system integration, test development, and schedule tracking.
    • A PCB designer’s critical impact on design for test.
    • How to make the schedule an effective design aid.
  4. Design V&V, production deployment, and sustaining.
    • How to generate documentation for build and product sustainability.
    • How PCB fabrication choices affect manufacturability.

At the end of this presentation, attendees will have a strategic outline on how to approach product development with practical examples.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 6:00 p.m.
29. PCB Design for Engineers
Speaker: Susy Webb, Design Science

This class will feature an overview of the processes of board design from an engineering perspective. To begin, we will have a conversation about how the electronics and physics are involved and why controlling rise time, field energy, and transmission lines are extremely important to the signals on the board. Placement will be discussed next, with order, flow, and setting up potential routing to come being some of those topics. The planes and stackup structure will play a major role in the quality of the design and impedance control, especially if the design is high-speed, and plane and capacitor placement are a large part of power distribution as well. The way signals are routed and how their return current is set up is critical for their performance. We will discuss fanouts, using grids, the signal flow from layer to layer, layer-paired routing and spacing. HDI technology can be a huge benefit to dense boards, fine-pitch parts, and BGAs, so we will go over their setup and routing. All these topics will include information on signal integrity, EMI and impedance control, to make a board that works well from the first build. Many aspects of making a board manufacturable also help to make it less expensive, so an examination of that will wrap up the technical information, followed by information on pros and cons of hand-routing vs. autorouting and the quality of board possible.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
 
 
12:00 p.m. to 1:00 p.m.
Free Lunch-and-Learn for Conference Registrants

Sponsored by American Standard Circuits, Inc. and Sunstone Circuits 

1:30 p.m. to 3:30 p.m.
31. The Mechanical Side of PCBs
Speaker: Tomas Chester, Chester Electronic Design

All PCB projects have mechanical and physical parameters, from their size to how they are supported within their utilization, which have downstream impacts within our digital thread. This seminar will take an in-depth look at a variety of existing EDA design tools and new mechanical methods that can be harnessed to yield a successful final product, while also examining the impact of stresses on the layer stackup. Whether you are a solo designer or an engineer within a large team, the material covered will enable participants to identify and solve complex design problems.

This seminar will focus on:

  • Existing implemented mechanical PCB features
  • Advanced PCB fabrication techniques
  • Thermal solutions in the mechanical domain.

The following topics will be covered:

  • PCB mounting holes and backdrilling
  • Cross-sectional strength of stackups
  • Thermal transfer within PCBs and impact of heatsinks
  • Semi-flex and multi-stackup stepped PCB construction.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
1:30 p.m. to 5:00 p.m.
32. PC Board Design for Power Distribution and Decoupling
Speaker: Rick Hartley, RHartley Enterprises

Power distribution in PCBs is the foundation around which all things work in the circuit. If this structure is not designed correctly, the entire circuit is at risk from noise and signal integrity issues, to say nothing of the severely increased possibility of EMI. Low impedance in the power distribution network, across the harmonic frequency range of a digital circuit, is critical. There are many subtle PCB layout techniques that have a major impact on power bus impedance.

This 3.5-hour course will discuss and define:

  • The impedance of vias, planes, and mounted inductance of capacitors
  • Energy delivery to IC cores and impact of IC pin out on bus impedance
  • Placement of decoupling in both moderate and high-layer-count PCBs
  • Multiple capacitor values and how to resolve anti-resonant peaks
  • Effect of ferrites in the power bus in digital and analog circuits
  • Importance of power/ground plane pairs and impact of ultra-thin pairs
  • The extreme importance of PCB stack-up on power delivery.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
3:30 p.m. to 5:30 p.m.
33. Differential Pair Design Masterclass
Speaker: Zachariah Peterson, Northwest Engineering Solutions LLC

Differential pairs are the primary routing style used in many high-speed digital protocols. The guidelines surrounding differential pair design and routing are very important for signal integrity, yet designers may be prone to implement the default rules from their CAD tools when designing and routing differential pairs.

In this presentation, we will address some of the longstanding myths surrounding differential pairs:

  • What factors affect differential pair impedance
  • The difference between odd-mode and characteristic impedance
  • The ambiguity and fallacy of tight coupling
  • Noise and crosstalk involving differential pairs
  • Why it’s sometimes best to limit length tuning
  • SI factors such as mode conversion and reflections
  • How to correctly route through vias in differential pairs.

Examples of real systems that were designed by the author and have entered volume manufacturing will be presented to illustrate these important concepts. Simulation examples will also be used to help illustrate the importance of certain design choices, and to illustrate some basic rules of thumb that help ensure signal integrity.

Who should attend: PCB Designer/Design Engineer, SI Engineer
Target audience: Intermediate, Advanced
10:00 a.m. to 12:00 p.m.
34. Proper PC Board Layout of DDR2, 3, 4 & 5
Speaker: Rick Hartley, RHartley Enterprises

“Guidelines and rules” have been developed, attempting to ensure that DDR bus structures function as intended. Unfortunately, many of the “rules” designers use are simply incorrect, putting the circuit functionality at risk of not operating as intended. The JEDEC standards for DDR specify how PCB layout should be structured. Many of the PCB layout rules we follow are overly conservative, putting excessive restrictions on PCB layout, adding time and cost to the design cycle. Poorly defined rules can also add layers and cost to the PCB.

This two-hour course will discuss and define:

  • Concepts and features of DDR memory buses
  • Best routing strategies for data, address, clocks, etc.
  • Proper line length matching to control timing
  • Best line impedance and termination schemes
  • Additional issues of extreme importance
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 12:00 p.m.
35. PCB Design Best Practices
Speaker: Stephen Chavez, Siemens

PCB designers today must take advantage of the automation and horsepower in our respective EDA tools. We just don’t simply “connect the dots” or “push the magic button,” as some suggest. We design complex PCBs that contain physical packages smaller than ever, but we are also addressing electrical, mechanical, and thermal variables in a much higher level of complexity due to today’s industry evolution, not to mention the need to design it faster while cutting costs and resources. We are designing PCBs that contain signal speeds and edge rates faster than ever. As if the electrical and mechanical design complexity of a PCB weren’t enough of a challenge, add in manufacturing and producibility complexities. All this makes designing entire complex systems a true challenge indeed. Simply put, success in PCB design means knowing and understanding what you are doing and how the decisions you make and implement upstream impact downstream ramifications.

With today’s EDA tools, harnessing the horsepower and capitalizing on their full capability, when possible, can be a huge difference in getting it right the first time, reducing respins (cost), increasing yields, and ultimately getting to market faster.

This session focuses on how to harness the horsepower of your respective EDA tool, optimize your internal processes, and share both good and not so good experiences in PCB design. We will discuss industry best practices within the design process, along with the pros and cons that affect ROI when best practice recipes are implemented and when they are not implemented (the cost of doing nothing).

What you will learn:

  • Increase productivity and proficiency with current/future EDA software (automation)
  • How to capitalize on existing known good hardware by taking advantage of IP reuse
  • Benefits of implementing best practices and the cost of doing nothing (remaining status quo)
Who should attend: PCB Designer/Design Engineer, System Designer
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. to 12:00 p.m.
36. The Mystery of Bypass Capacitors
Speaker: Keven Coates, Fluidity Technologies

How do you design a high-speed digital circuit with enough bypass caps in the right area to supply all the peak power demands? You can’t listen to all the expert advice because it seems they can’t even agree! This presentation covers power distribution network basics and shows three approaches with simulation results for each, and some real-world experience and advice on bypassing for high-speed circuits.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
 
 
12:00 p.m. to 1:00 p.m.
Free Lunch-and-Learn for Conference Registrants

sponsored by Sierra Circuits (for Friday conference attendees only)

1:30 p.m. to 5:00 p.m.

38. RF and Mixed Signal PCB Design

Speaker:Rick Hartley, RHartley Enterprises

This session is intended for board designers to understand the things RF engineers request during PCB layout. Experienced RF engineers will likely not learn anything new from this course, as the material is mainly geared to board designers.

Due to sensitivity in analog circuits, the keys to full functionality (whether you are designing very high-frequency analog PCBs, mixing RF with digital, or mixing low-frequency analog with digital) are signal integrity and noise control in the design of the printed circuit board. This course will cover differences between analog and digital, circuit changes over time, lumped versus distributed length lines, reflections/return loss/VSWR, low- and high-frequency current, transmission line behavior, impedance control, microstrip vs. stripline, coplanar waveguide with ground, circuit termination, 1/4 wavelength couplers and filters designed into board copper, layout techniques and strategies, critical routing and circuit isolation, ground plane splitting (when to and when not to), mismatched loads and other discontinuities, signal splitters, tuning transmission lines, power bus decoupling for RF versus digital circuits, and board stackups for mixed RF and digital circuits.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate
 
 
1:30 p.m. to 5:00 p.m.
40. Grid Systems and Routing Channels May Make Complex Boards Possible
Speaker: Susy Webb, Design Science

There are some great benefits to using grid systems in PCB designs. They can help with the symmetry of placing parts and keep them in alignment so that they don’t encroach into or limit routing lanes. Using a via grid for through-hole or HDI fanout helps get more signals out of large parts like BGAs and can help set up routing and return path, as well. Routing via grids can also set up routing channels to get the maximum number of signals through the open areas between parts. Those channels can be anything from short and simple grid patterns that consider paths for just a few signals in each direction, to long and more constrained freeways specifically designed for major bus flow. In this presentation, we will discuss placing parts, fanout vias, routing vias, and rough in routing as some of the ways to set up channels, plus some restrictions for which signals and spacing may be used within the channels, with lots of examples for all.

Who should attend: PCB Designer/Design Engineer, Hardware Engineer
Target audience: Intermediate
1:30 p.m. to 5:00 p.m.
41. Heat Management for SMD, LED, and Systems 1W to 50W
Speaker: Keven Coates, Fluidity Technologies

Do you use power MOSFETs, high-power LEDs, power resistors, or hot processors in your design and want to avoid heat-related system failures? This course covers the best options for you to manage heat cost-effectively and reliably. It provides a good overview of PCB design to maximize SMD/LED heat dissipation. It also covers how to choose the right heat sink interface materials, heat sink designs, natural and forced airflow options, as well as heat dissipation simulations (both mechanical and in software). We’ll go over some helpful tools, and break down thermal resistance equations to simple terms. Heat management doesn’t have to be scary. Take this class to know your options. Now with LED specifics!

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer
Target audience: Beginner, Intermediate, Advanced