With continuous technology developments, electronic circuits are not only getting faster and smaller, but also more power hungry. As a consequence, related thermal issues are more prevalent than ever, because most PCBs these days comprise a number of high-power components such as high-performance processors, transceivers, MOSFETs, high power LEDs, etc., causing excessive heat. Furthermore, power conversion circuitry such as DC-DC converters and regulators are major culprits behind temperature rise and hotspots. Besides the components, resistance of the electrical connections, copper traces and vias contribute to heat and power losses.

Thermal stress is one of the main causes of circuit malfunctioning, as it leads to a degradation of performance or even a possible malfunction or failure of the system. To combat thermal stresses at layout level, PCB designers need to incorporate effective techniques to reduce the impact of heating, such as careful selection of material, component selection, placement, power ground plane construction, thermal vias and a lot more. We’ll learn all these effective strategies and tricks that a layout engineer can adopt to identify and mitigate major hotspots to improve thermal performance of PCBs.

As engineers, we get to solve problems! The projects we work on will have design requirements that go against design best practices. Mechanical, marketing, and cost constraints restrict designs, requiring innovative thinking to make the product work. Often, prototypes won’t work despite our best efforts. These are the problems that challenge us and make our work interesting.

This presentation will help to improve the communication, planning and technical skills needed to deal with design problems as they arise. In this presentation, we will discuss how communication is one of our best tools for resolving technical problems. We will learn about planning for projects, and for resolving issues. We will look at the tools, such as simulation software and design rules, that help us to avoid pitfalls and streamline the design process. We will also cover some troubleshooting recommendations for common problems such as radiated emissions, crosstalk, power supply failures, processor boot-up problems, and manufacturing defects.

Everyone talks about signal integrity in PCBs, but few circuit boards operate without external wiring. Whether it’s as simple as power wiring, as complicated as high-speed differential pairs, or even worse, non-differential pairs, there are good and bad ways to use the connectors and cables available to us today. This class will show how connectors and cables relate to basic SI concepts. How does the energy flow in the wiring? What determines impedance? How many grounds do I need in the cable? How do I pick connectors? I will go over practical examples showing the tradeoffs, since nothing is completely ideal. This class will shed new light on how we can apply the same signal integrity rules for other things to wires and cabling.

This course covers all the technical issues involved in the design of very high-speed differential pair signal paths. This is a thorough treatment of the topics to consider to be successful as the speeds of differential pair signal paths increase. 56Gb/s signaling is being shipped in high-performance servers, routers and switches. When data rates exceed 56Gb/s, a number of areas need to be managed that were not significant issues at lower data rates. Among these are the type of glass weave used in laminates, the surface finish on the copper used for signal layers and the loss characteristics of the laminate itself. Effects of vias and other drilled holes can have a significant effect on signal quality if not properly managed. This course will draw on more than 30 test PCBs built to determine the properties of new laminate systems as well as to measure the effects of vias, plane crossings and other features that might affect high speed signals.

Today, supply voltages decrease with every new silicon generation, contributing as well to the goal of reducing power consumption of electronics. This and the resulting shrinking noise margins for these ICs define increasing demands for the quality and stability of power distribution systems of the PCBs. Shrinking form factors with decreasing board real estate (e.g., IoT devices) and emerging technologies (e.g., autonomous driving, advanced communication units) add fuel to the fire. Hence tighter requirements and constraints from silicon vendors are defined for the power distribution networks (PDN) PCB designers have to follow and implement in conjunction with tighter decoupling schemes. Application-dependent restrictions (e.g., discrete package allowance in automotive) and stringent cost and quality demands further complicate the game.

In this two-hour workshop, the requirements and the basics of PCB power distribution systems are explained in detail. Plate capacitance, loop inductances and cavity resonance are explained without deep math. Side effects to the signal integrity (SI) and EMC behavior of board structures are discussed using illustrated practical examples. The role of decoupling capacitors and their evolution in recent years are a major part of the workshop. Guidelines for a first order covering and resolving power integrity issues are given regardless of the used PCB design and ECAD process. Simulation capabilities addressing power integrity (PI) during PCB design will be explained and demonstrated by animated slides in a generic, vendor-neutral manner as one powerful problem-solving approach for PI issues. Silicon vendor support documents (e.g., design guidelines, constraint documents, reference designs or spreadsheet tools) to address power integrity are introduced and discussed. Examples from various industries (e.g., automotive) will complement the session with practical application experience.

New system designs often have a 33% fail rate! Learn how to make that significantly better through parts placement, orientation, and knowledge of the assembly process. This class is less about PCBs and more about learning to work with assembly shop practices and understanding the assembly process. This class is based on the presenter’s experience as the EE in charge of working with the in-house assembly operation to increase yield. Design for assembly (DfA) is crucial to improving first runs and getting them to production-friendly yields.

When designing a PCB, the way the signals flow is critical to proper circuit function. Routing cannot be performed as a random connecting-the-dots methodology, but must be carefully thought out as to what layer the signals are on, where they go when they change layers, and how the return energy will get back to the source. The first thing this presentation discusses is the physics of how the signal and its return energy flows within the structure of a board, and the planning that is needed. Then, we discuss how to control that energy to avoid interference by the way the signals and busses are placed. That will include discussing the damage that can be caused to signals by poor routing of noisy signals, poor placement and routing of buses, poor spacing between signals, or poor routing such as crossing splits in return planes. Finally, we will discuss some stackup ideas for best containment and control of the energy.

The rise of generative artificial intelligence – the technology at the heart of ChatGPT – has disrupted numerous industries including our own. In this talk, DarwinAI CTO Gary Pacheco will provide a compelling overview of the power of generative AI (along with its “regular” variant) to improve the visual inspection of PCBAs.  Key topics include rapid product configuration, vastly reduced programming time, data efficiency, continuous and dynamic learning, and reducing hardware cost and complexity.

Maintaining a product is very difficult when:

• The source files aren’t available
• Only Gerber files and maintenance documents are available
• Making a revision to a company-owned product with no source files.

This webinar presents a skillset to technicians, designers and engineers that leverages assembled PCBs without design data to be recovered and recreated. Often, end-of-life or existing systems have design data that are lost, abandoned or of unknown origin, a rising concern among teams building or maintaining these systems. Using a set of software- and hardware-agnostic processes, this course analyzes a design of unknown origin and recreates that design with a set of commonly available tools. Once equipped with this skillset, attendees will have the knowledge to recreate and recover lost or unavailable design data on current and future projects.

The course will introduce:

• Basic reverse-engineering techniques with benchtop test equipment
• Reworking and testing techniques
• Identifying PCB structures
• Identifying components
• Using photography and image manipulation tools
• Migrating the design into a generic ECAD tool.

Artificial intelligence has made its way into ECAD and other software used in electronics manufacturing. But what’s the actual intelligence in these tools? CTOs of major tool makers discuss the future of AI. We are inviting the CTOs and related domain experts from a handful of ECAD companies to participate. This is intended to give a snapshot of where we are, what’s feasible, and the forecasted timeline for implementation.

• Tomide Adesanmi, Circuit Mind
• Michael Jackson, Ph.D., Cadence
• Kyle Miller, Ph.D., Zuken
• Sebastian Schaal, Luminovo

This presentation will discuss ultra-high-density interconnects from a board fabricator’s perspective. Covered will be the technology approach and manufacturing processes used to manufacture ultra-high-density interconnects with 25 micron and smaller line width/spacing. Design approaches to minimize complexity, increase reliability and areas of concern in use of various design solutions will be presented.

The attendee will leave with a better understanding of how to use ultra-high-density interconnects, work with their fabricator on design approaches, and knowledge of processing techniques.

When executing PCB layout, we tend to treat digital circuits differently from analog circuits. Each has its own critical requirements. Switch mode power supplies are another wrinkle altogether, and usually need to be treated differently from either. All switch mode power supplies have four to five circuit loops, all of which are important, but a couple of these loops are downright critical in terms of PCB layout. An improperly designed switch mode supply will often not function as intended, and in some cases will not function at all. In contrast, understanding what makes up a switcher circuit and knowing how to take care of the loops during board layout will permit these supplies to operate flawlessly with very high efficiency.
This two-hour course will outline the difference between switchers and series-regulated power supplies, the different types of switcher circuits (buck, boost, etc.), basic theory of operation of switcher circuits and the impact of the various components, definition and behavior of the five loops, layout to isolate loops from one another, minimize voltage drop, and control current paths, layout to minimize noise and EMI, effect of paralleling output capacitors and proper grounding technique.

It’s more important than ever to extend your PCB design skills beyond digital circuits. Besides, the broader your design domain skills, the more you can get paid.

This tutorial is on the principles, analysis, design and use of PCB antenna structures as well as off-the-shelf antenna components. It is for any PCB designer who wants to improve their skill and confidence in understanding and designing boards with integrated and discrete antennas for any application.

The learning objectives are to give attendees:

• A more intuitive, visual understanding of the physics by which PCB antennas operate
• The confidence to say “yes” to designing high-frequency PCB layouts, particularly involving antennas
• The skills to design the most popular types of PCB antennas
• Access to free tools that will accelerate the design process and assist with modeling
• The techniques most frequently used for impedance matching, tuning, and arraying
• Knowledge for choosing the best type of antenna for a given purpose or design situation.

This workshop will guide design teams through the process of evaluating and selecting the right laminate for a design, creating PCB stackups that meet the requirements of complex, multilayer boards that work right the first time, within budget, and with reproducible results across multiple fabricators. The course will go into detail on tradeoffs between loss and cost, including dielectric loss, resistive loss, surface roughness, as well as glass-weave skew. After attending this course, students will be knowledgeable of PCB laminate tradeoffs, the laminate-materials market, and the process of troubleshooting problematic stackup designs. Attendees will also be exposed to cost-effective strategies for controlling loss and glass-weave skew.

This course will walk the audience through the entire multilayer PCB fabrication process, making stops along the way to explain how PCB design requirements affect the numerous fabrication steps and if/how the finished product can meet the intended quality and reliability requirements. A detailed explanation will be given for each of the process steps and how that step affects quality and reliability. Design requirements will be discussed, with an explanation of the dos and don’ts of how they affect fabrication and impact yields. Process controls adopted by the fabricator to ensure maximum yields and quality are maintained during each step of fabrication will also be covered, as well as the pros and cons of variables available to the designer: solder mask, surface finish, materials selection, copper weights, feature size, etc. The course also looks at fabrication drawing specifications and how they can affect yield, cost, quality and reliability.

A practical design walkthrough of an embedded system, drawing real life examples from a multi-purpose IO expander/data concentrator product design. The walkthrough will address multi-business level approaches (corporate/enterprise, small business, entrepreneur) and will be biased toward PCB design.

The presentation material will be broken down into four phases:

1. Requirements hierarchy, system requirements, and high-level effort/schedule estimations.
   • How to define a hierarchy, write effective system requirements, and develop practical estimations.
   • Why PCB designers should care enough to get involved, how to get involved and stay involved.
2. System design, HW/SW/TEST requirements generation, and effort/schedule refinement.
   • How to develop effective HW/SW/TEST requirements from a system design.
   • How to embed PCB design practices into the requirements.
3. HW/SW design, system integration, test development, and schedule tracking.
   • A PCB designer’s critical impact on design for test.
   • How to make the schedule an effective design aid.
4. Design V&V, production deployment, and sustaining.
   • How to generate documentation for build and product sustainability.
   • How PCB fabrication choices affect manufacturability.

At the end of this presentation, attendees will have a strategic outline on how to approach product development with practical examples.

This class will feature an overview of the processes of board design from an engineering perspective. To begin, we will have a conversation about how the electronics and physics are involved and why controlling rise time, field energy, and transmission lines are extremely important to the signals on the board. Placement will be discussed next, with order, flow, and setting up potential routing to come being some of those topics. The planes and stackup structure will play a major role in the quality of the design and impedance control, especially if the design is high-speed, and plane and capacitor placement are a large part of power distribution as well. The way signals are routed and how their return current is set up is critical for their performance. We will discuss fanouts, using grids, the signal flow from layer to layer, layer-paired routing and spacing. HDI technology can be a huge benefit to dense boards, fine-pitch parts, and BGAs, so we will go over their setup and routing. All these topics will include information on signal integrity, EMI and impedance control, to make a board that works well from the first build. Many aspects of making a board manufacturable also help to make it less expensive, so an examination of that will wrap up the technical information, followed by information on pros and cons of hand-routing vs. autorouting and the quality of board possible.

All PCB projects have mechanical and physical parameters, from their size to how they are supported within their utilization, which have downstream impacts within our digital thread. This seminar will take an in-depth look at a variety of existing EDA design tools and new mechanical methods that can be harnessed to yield a successful final product, while also examining the impact of stresses on the layer stackup. Whether you are a solo designer or an engineer within a large team, the material covered will enable participants to identify and solve complex design problems.

This seminar will focus on:

• Existing implemented mechanical PCB features
• Advanced PCB fabrication techniques
• Thermal solutions in the mechanical domain.

The following topics will be covered:

• PCB mounting holes and backdrilling
• Cross-sectional strength of stackups
• Thermal transfer within PCBs and impact of heatsinks
• Semi-flex and multi-stackup stepped PCB construction.

Power distribution in PCBs is the foundation around which all things work in the circuit. If this structure is not designed correctly, the entire circuit is at risk from noise and signal integrity issues, to say nothing of the severely increased possibility of EMI. Low impedance in the power distribution network, across the harmonic frequency range of a digital circuit, is critical. There are many subtle PCB layout techniques that have a major impact on power bus impedance.

This 3.5-hour course will discuss and define:

• The impedance of vias, planes, and mounted inductance of capacitors
• Energy delivery to IC cores and impact of IC pin out on bus impedance
• Placement of decoupling in both moderate and high-layer-count PCBs
• Multiple capacitor values and how to resolve anti-resonant peaks
• Effect of ferrites in the power bus in digital and analog circuits
• Importance of power/ground plane pairs and impact of ultra-thin pairs
• The extreme importance of PCB stack-up on power delivery.

Differential pairs are the primary routing style used in many high-speed digital protocols. The guidelines surrounding differential pair design and routing are very important for signal integrity, yet designers may be prone to implement the default rules from their CAD tools when designing and routing differential pairs.

In this presentation, we will address some of the longstanding myths surrounding differential pairs:

• What factors affect differential pair impedance
• The difference between odd-mode and characteristic impedance
• The ambiguity and fallacy of tight coupling
• Noise and crosstalk involving differential pairs
• Why it’s sometimes best to limit length tuning
• SI factors such as mode conversion and reflections
• How to correctly route through vias in differential pairs.

Examples of real systems that were designed by the author and have entered volume manufacturing will be presented to illustrate these important concepts. Simulation examples will also be used to help illustrate the importance of certain design choices, and to illustrate some basic rules of thumb that help ensure signal integrity.

“Guidelines and rules” have been developed, attempting to ensure that DDR bus structures function as intended. Unfortunately, many of the “rules” designers use are simply incorrect, putting the circuit functionality at risk of not operating as intended. The JEDEC standards for DDR specify how PCB layout should be structured. Many of the PCB layout rules we follow are overly conservative, putting excessive restrictions on PCB layout, adding time and cost to the design cycle. Poorly defined rules can also add layers and cost to the PCB.

This two-hour course will discuss and define:

• Concepts and features of DDR memory buses
• Best routing strategies for data, address, clocks, etc.
• Proper line length matching to control timing
• Best line impedance and termination schemes
• Additional issues of extreme importance

PCB designers today must take advantage of the automation and horsepower in our respective EDA tools. We just don’t simply “connect the dots” or “push the magic button,” as some suggest. We design complex PCBs that contain physical packages smaller than ever, but we are also addressing electrical, mechanical, and thermal variables in a much higher level of complexity due to today’s industry evolution, not to mention the need to design it faster while cutting costs and resources. We are designing PCBs that contain signal speeds and edge rates faster than ever. As if the electrical and mechanical design complexity of a PCB weren’t enough of a challenge, add in manufacturing and producibility complexities. All this makes designing entire complex systems a true challenge indeed. Simply put, success in PCB design means knowing and understanding what you are doing and how the decisions you make and implement upstream impact downstream ramifications.

With today’s EDA tools, harnessing the horsepower and capitalizing on their full capability, when possible, can be a huge difference in getting it right the first time, reducing respins (cost), increasing yields, and ultimately getting to market faster.

This session focuses on how to harness the horsepower of your respective EDA tool, optimize your internal processes, and share both good and not so good experiences in PCB design. We will discuss industry best practices within the design process, along with the pros and cons that affect ROI when best practice recipes are implemented and when they are not implemented (the cost of doing nothing).

What you will learn:

• Increase productivity and proficiency with current/future EDA software (automation)
• How to capitalize on existing known good hardware by taking advantage of IP reuse
• Benefits of implementing best practices and the cost of doing nothing (remaining status quo)

How do you design a high-speed digital circuit with enough bypass caps in the right area to supply all the peak power demands? You can’t listen to all the expert advice because it seems they can’t even agree! This presentation covers power distribution network basics and shows three approaches with simulation results for each, and some real-world experience and advice on bypassing for high-speed circuits.

There are some great benefits to using grid systems in PCB designs. They can help with the symmetry of placing parts and keep them in alignment so that they don’t encroach into or limit routing lanes. Using a via grid for through-hole or HDI fanout helps get more signals out of large parts like BGAs and can help set up routing and return path, as well. Routing via grids can also set up routing channels to get the maximum number of signals through the open areas between parts. Those channels can be anything from short and simple grid patterns that consider paths for just a few signals in each direction, to long and more constrained freeways specifically designed for major bus flow. In this presentation, we will discuss placing parts, fanout vias, routing vias, and rough in routing as some of the ways to set up channels, plus some restrictions for which signals and spacing may be used within the channels, with lots of examples for all.

Do you use power MOSFETs, high-power LEDs, power resistors, or hot processors in your design and want to avoid heat-related system failures? This course covers the best options for you to manage heat cost-effectively and reliably. It provides a good overview of PCB design to maximize SMD/LED heat dissipation. It also covers how to choose the right heat sink interface materials, heat sink designs, natural and forced airflow options, as well as heat dissipation simulations (both mechanical and in software). We’ll go over some helpful tools, and break down thermal resistance equations to simple terms. Heat management doesn’t have to be scary. Take this class to know your options. Now with LED specifics!