Join an A-list of experts as we take a deep look at managing distribution in times of rapid change, addressing the use of AI, new product introduction, global manufacturing and new facility engineering expansion. This special program is designed for upper-level management and directors.

The IPC-2581 Consortium is a group of PCB design and supply chain companies whose collective goal is to enable, facilitate and drive the use of IPC-2581 in the industry. It is devoted to accelerating the adoption of IPC-2581 as an open, neutrally maintained global standard to encourage innovation, improve efficiency and reduce costs. Join the more than 140 member companies for this all-day free program for anyone interested in improving the bidirectional exchange of electronic data from design to manufacturing.

Designing a PCB when you are not involved in the schematic or mechanical development presents unique challenges. Recognizing these knowledge gaps early and addressing them proactively can greatly enhance the efficiency and quality of the final layout. This presentation will provide actionable strategies for designers to navigate the process of PCB layout from input review through generating final outputs.

Key topics covered:

• Input review: Pre-existing files and library requirements
• Establishing design constraints: Mechanical input and electrical specifications
• Manufacturing considerations: Capabilities, DfM and documentation
• Balancing tradeoffs: Time, cost and performance considerations.

What you will learn:

• Key conversations to have upfront to streamline your design process
• Best practices for aligning with your team early and consistently
• How to position yourself as a key resource for the design team.

Effective switch mode power supply (SMPS) design begins with understanding how PCB layout governs both performance and electromagnetic behavior. Designers often encounter excessive radiated and conducted noise, reduced efficiency, unstable regulation or complete startup failure. This course provides a practical framework for identifying the critical loops, understanding their switching behavior and applying layout techniques that ensure clean, predictable operation. Through a combination of topology fundamentals, real-world examples and best practice layout strategies, attendees will learn how to build SMPS designs that meet EMI requirements, achieve high efficiency, and operate reliably across a wide range of conditions.

Topics to be covered:

• Fundamentals of SMPS operation and the EMI mechanisms inherent to switching converters
• Analysis of the five SMPS current loops, with emphasis on the critical high di/dt paths
• Strengths, limitations, and hidden pitfalls of self-contained SMPS controller modules
• PCB layout strategies for minimizing loop area, controlling switch node behavior, and routing feedback paths
• Grounding techniques for 1- and 2-layer PCBs versus multilayer stackups, including return path integrity
• Guidance on when to remove ground copper under the switch node or inductor – and when not to
• Effective versus ineffective EMI control methods, supported by practical examples.

If a new board is connected physically but doesn’t work electrically or won’t interface correctly with the rest of its system, it may require costly, time-consuming redesign and retesting, meaning poor time-to-market for the product and loss of possible revenue for the company.

There are many ways to place parts on any board, but some clearly work much better for the physics, electrical, mechanical and manufacturable purposes. The board engineer must understand all those things, and how they affect one another in order to know how to make good decisions for the board and so avoid any potential problems.

This presentation will examine:

• Choosing effective parts that will work well together for physics, flow, shape, package and voltage
• Setting up groupings of parts that should be placed together for function, power, analog, filters, busses, drivers and voltage
• Placement concepts, including planning, color coding, grids and reuse
• Approximate order of placing parts for mounting, location, and needs
• General placement issues for lower assembly cost, flow, side of the board, cooling and routing needs
• Detailed placement to set up routing, including rows and columns, maps, stubs, types of routing for sequencing, termination needs and filters
• Examples of placement to set up routing channels
• Placement for manufacturability.

A well-designed PCB stackup can significantly influence the performance and longevity of an electronic product. It affects signal integrity, power distribution, impedance control, thermal performance, and mechanical reliability. Conversely, a poorly chosen stackup can lead to issues such as crosstalk, electromagnetic interference (EMI), excessive heat generation, and reduced durability, resulting in higher production costs and increased time-to-market. By understanding the foundational principles of stackup design, designers can address these challenges early in the design process and ensure successful implementation.
Topics covered:

• Fundamentals of PCB stackup design: Core concepts and definitions for rigid, flex, and rigid-flex boards.
• Material selection: How to choose laminates, prepregs, and adhesives for different applications.
• Impedance control: Techniques for achieving consistent impedance across signal layers.
• Signal integrity: Managing high-speed signals and reducing crosstalk and EMI.
• Thermal considerations: Addressing heat dissipation in complex designs.
• Mechanical reliability: Ensuring durability in flex and rigid-flex boards under dynamic conditions.
• Manufacturability: Guidelines to optimize stackup design for cost-effective fabrication.
• Layer count optimization: Balancing performance needs with cost constraints.
• Real-world examples: Case studies demonstrating effective stackup design strategies.

What you will learn:

• A comprehensive understanding of stackup design principles for rigid, flex, and rigid-flex PCBs.
• How to select materials that meet electrical, thermal, and mechanical requirements.
• Mastering impedance and signal integrity management techniques for high-performance designs.
• Strategies to optimize stackup configurations for manufacturability and cost efficiency.
• How to design for thermal performance and reliability in challenging applications.
• Explore real-world scenarios that highlight the impact of effective stackup design.
• Actionable insights into minimizing crosstalk, EMI, and other performance issues.
• Skills to collaborate effectively with fabricators and ensure design intent is achieved.

This presentation is ideal for PCB designers, engineers, and anyone involved in the development of electronic systems who seeks to enhance their expertise in stackup design.

When time-varying (AC) signals travel in the transmission lines of a PCB, state changing electric and magnetic fields are present. These fields, when not controlled, are the source of noise and EMI. ICs with very fast rise time outputs have made problems common, even in circuits clocked at low frequencies. Knowing all the basics of proper grounding, most of all high-quality PCB stackups, will help contain and control fields, making noise and EMI issues virtually nonexistent.

Key topics covered:

• “Grounding” defined and energy movement in a PCB
• Keys to controlling common mode energy and resulting EMI
• Cables, heat sinks, board edges and other unintended radiators
• Effects of IC style and packaging on overall grounding scheme
• Impact of connector pin out on containment of energy
• Divided planes and plane islands in the PCB
• Best PCB stackups for optimum grounding schemes.

HDI and UHDI designs push the limits on layer thickness in conventional materials in PCBs and IC substrates. Thinner materials and additive processes (SAP/mSAP) have enabled much higher trace densities on thin layers, but the impacts on SI, PI, and EMI at high trace densities and in high-bandwidth channels are still being investigated. Due to the interplay between linewidth, allowable line spacing based on crosstalk, Dk value, channel bandwidth and layer thickness, it is important to understand how signal behavior is altered when designs are pushed into thinner materials.

This presentation will show how thinner materials and their Dk values affect signal integrity, as well as what designers can do to hit SI targets by balancing Dk, copper roughness, and laminate thickness. These trends will be discussed in terms of HDI/UHDI PCBs, but the same trends are seen in IC substrates and substrate-like PCBs, and the implementation of those practices for more advanced PCBs will be discussed to illustrate how to support bandwidths reaching 56GHz.

Topics to be presented:

• Why there is a trend toward lower Dk in terms of signal integrity and line width/spacing densities
• How standard signal integrity metrics vary with Dk/Df values, and roughness down to 1 mil layer thicknesses
• How Dk and layer thickness affect single-ended and differential crosstalk, thus limiting allowed trace density
• How routing and via structures in HDI/UHDI PCBs and IC substrates affect signal integrity and available channel bandwidth
• Design examples showing how Dk and layer thickness are used to enable broadband signal integrity in single-ended nets, RF nets and differential nets.

Simulation examples from real designs will be presented to illustrate the design tradeoffs listed above, and implementation in real designs will be shown as examples. Designers will learn how to balance tradeoffs between Dk value, Df value, copper roughness and laminate thickness when selecting stackup materials based on the frequency range that is important in their systems.

Although making electronic hardware prototypes is becoming increasingly more accessible, each design and manufacturing cycle involves costs and timelines that challenge electrical engineers and systems designers alike. Using best practices in circuit and PCB design enables faster development and more accurate results from the very first iteration.

The goal of this presentation is to demonstrate good design practices for developing PCB prototypes that:

• Work right out of the box
• Facilitate adjustments and corrections, if needed
• Allow comprehensive testing
• Enable expansion
• Streamline embedded software design
• Accelerate product development and consequently reduce cost.

What you will learn:

• Differences between projects on paper (ideal world) and in the real world. Budget and schedule, real components, EMC, SI/PI, DfM, DfT, etc.
• Hardware development cycle overview. Block diagrams and project phases: POC, EVT, DVT, PVT, mass production, etc. (the focus of the best practices will be mostly on the proof-of-concept and engineering validation testing phases)
• Best practices in electronic circuit design. Reference documents, simulation and prototyping tools, component selection, resources for debugging and future expansion
• Best practices in PCB design. Library management, stackup definition and floor planning, modularity, resources for software development and debugging, mechanical integration
• Tips for board bring-up.

The role of AI in PCB design is becoming crucial as the industry faces a workforce shortage, increasing design complexity and costs, and tighter delivery schedules. This session examines how AI could address these challenges by automating processes, augmenting designer capabilities and improving efficiency. Rapidly evolving technologies like agentic AI will be addressed, as well as their application to the design process.

Used effectively in the right environment, AI enables faster, high-quality PCB development. Additionally, AI tackles rising design complexity by analyzing large datasets to optimize performance, reduce costs and enhance design quality. PCB engineering teams that want to stay ahead of the curve should evaluate, adapt and embrace the opportunities that AI-infused design will deliver.

The session will also explore challenges associated with AI implementation such as model training data, IP security, results verification and adoption resistance. We’ll discuss where AI excels and what AI is applicable in design today.

Key topics covered:

• The promise of AI (an intro to AI as applied to PCB design, and possible benefits)
• The reality today (different forms of AI)
• Plausible areas of deployment in PCB
• Challenges in deployment.

Come learn about the Printed Circuit Engineering Association, an international network of engineers, designers and anyone related to printed circuit development. Its mission is to promote printed circuit engineering as a profession and to encourage, facilitate and promote the exchange of information and the integration of new design concepts through communications, seminars, workshops and professional certification via a network of local and regional PCEA-affiliated groups.
We will present our annual awards for Leadership and Membership.

This panel will touch on many subjects to raise awareness in the community and ensure we are not left behind in our careers as the industry continues to evolve. As background, we started with conversations with industry leaders and experts. What are they seeing? What are we missing? What do they think we need to be looking at to be prepared for the next 2-5 years?

Key points to cover:

• The current state of AI in PCB design
• Interposer boards (between PCBs and semiconductors)
• High-speed/high-current update – Where are we now, where are we heading
• Optics
• Where are designers coming from.

This is intended as an overview to provide exposure to coming trends. It will not be a deep technical dive into any of these subjects. The aim is to provide enough information for users to prepare for where the industry might be headed. This may help inform career directions, opportunities and choices to consider in the coming years.

Modern electronics demand sophisticated printed circuit board design, balancing solvability, performance, and manufacturability amidst increasing component densities and routing complexities. This abstract explores critical considerations like signal integrity, EMI, power integrity, thermal optimization and manufacturability, all requiring an integrated approach.

We’ll discuss leveraging electronic design automation (EDA) tools, including AI/ML advancements, for efficient, first-pass success. Robust simulation and design-for-manufacturing (DfM) are key. Successful PCB development also hinges on strong cross-disciplinary collaboration and integrating design-for-testability (DfT) principles. Finally, we’ll examine how Industry 4.0 and IoT trends are shaping future PCB design, particularly concerning connectivity and security.

This session offers a comprehensive overview of challenges and innovative solutions, emphasizing the interdisciplinary approach essential for today’s dynamic PCB landscape.

What you will learn:

• Strategies for critical PCB design challenges (signal integrity, EMI, power integrity, thermal management)
• Effective use of advanced EDA tools, including AI/ML, for efficiency and reliability
• The importance of interdisciplinary collaboration, DfM and DfT
• How Industry 4.0 and IoT trends impact future PCB design.

This course covers the entire gamut of flexible and rigid-flex circuits from two of the most recognized names in the flexible circuit industry: Mark Finstad (co-chair of IPC-2223) and Nick Koop (co-chair of IPC-6013).
Key topics covered:

• Mechanical design/material selection
• Cost drivers
• Bending and forming concerns
• Testing
• Issues unique to rigid-flex.

This course also includes a complete virtual plant tour of a flexible circuit manufacturing facility to help attendees understand the manufacturing processes. Throughout the presentation, the instructors will share real-life stories of flexible circuit applications gained over 35+ years in the industry. Some are success stories, others not so much, but all provide excellent lessons learned. The instructors also welcome and encourage questions and enjoy wandering off-course with lively interactive discussions on specific topics from the class.

There is no doubt that designing a printed circuit board is a complex undertaking, incorporating all the electronics and physics needed for quality boards. One thing often used to help predict that the signals and board are being laid out well is simulation. While simulation is very helpful, not every company has a simulation tool (or specialist) that can be utilized for that effort. And unfortunately, simulation itself is incapable of catching every issue of concern. This 3.5-hour presentation will discuss skills the designer must understand and use to set up high quality boards with low noise, good signal integrity, no EMI concerns, are manufacturable, and perform well while in service.

Topics to cover:

• Electronics and physics of signals as to what and where the energy actually is, along with its ability to spread out and possible containment measures needed
• Impedance control and other measures that can be used to help control and contain energy
• Guidelines for placing parts based on schematic, voltage, bus flow, and EMI concerns
• Routing issues and a general routing plan for order, signal energy control, layer paired routing, controlling spacing, layer control, energy spread, and crosstalk and antenna avoidance
• Stackup needs and the issues that affect choosing routing layers, the number of plane layers, and overall layer count.

There is no efficient way for designers to receive feedback from their manufacturing partner. At every stage when the data are handled by the manufacturer, feedback is sent through electronic paper, and because feedback is being shared in multiple pieces, those on the designer side must interpret the feedback correctly. Design-for-manufacturability (DfM) analysis has issues as well due to the disparate electronic paper files, which the designer must correlate and then interpret the data, respond to the queries, and approve or reject requests for change. This happens with fab, assembly and test as well.

This unreliable process results in increased development cycles and delays in product launches on the design side, and increased manufacturing cycles and delays in getting paid on the manufacturing side. The processes are not repeatable because every company has its own way of handing off that is not consistent.

IPC-2851 provides rich, intelligent digital content for fabrication, assembly, and test. The single file includes a hierarchical BoM with complete component attributes for values, tolerances, units of measure, part rank, part class, and more. IPC-2581 also provides electronically executable DFM feedback. While other formats require feedback data to be shared via electronic paper, IPC-2581 delivers that data in XML, which design tools can execute, allowing the engineer to correlate the feedback with specific items in the design: the tools do the work rather than the designer intervening manually. This can be applied to fabrication DfM analysis feedback as well as assembly DfM analysis feedback.

Effective printed circuit board (PCB) design extends beyond the meticulous consideration of layer stackup and appropriate PCB materials; it equally hinges on the strategic integration of assembly elements. Recognizing the pivotal role that assembly processes play in the manufacturability of a board, this course provides participants with a comprehensive understanding of the intricacies of assembly procedures. By immersing attendees in the nuances of the assembly process, this training empowers them to adeptly navigate the feedback loop, thereby guaranteeing the triumph of present and forthcoming designs.

The course will delve into the following aspects of assembly:

• Small components and stencil requirements
• Designing with thermal relief and why
• Typical assembly issues and how designers can fix them.

This course will impart not only theoretical knowledge but also reinforce learning through practical application. By conducting in-depth analyses of their root causes and instances of failures, participants gain valuable insights into preemptive strategies. Armed with this knowledge, they will be able to proactively mitigate potential issues, ensuring a resilient and successful approach to their current and future designs.

In an era where electronic systems transcend traditional flat-plane constraints, three-dimensional molded interconnect devices (3D-MIDs) are revolutionizing how we approach circuit design. This 2-hour session introduces the fundamentals of MID technology – encompassing materials, manufacturing techniques, and design strategies – while highlighting its transformative potential for mechanical-electrical integration.

Key topics covered:

• Fundamentals of MID technology, highlighting the advantages of 3-D molded interconnect devices over traditional planar PCBs and flex circuits
• Comparing two-shot molding with laser direct structuring (LDS) to illustrate different manufacturing techniques and their impact on design fidelity
• Providing a holistic view of the 3D-MID ecosystem, including materials selection, design platforms, data formats, and effective collaboration with MID fabricators

Further, the seminar will delve into the diverse landscape of materials, design workflows, and manufacturing strategies:

• Examining a range of LDS-grade materials and their suitability for various mechanical, thermal, RF and biocompatible requirements
• Demonstrating practical design workflows across various ECAD/MCAD tools, and exploring component placement, 3-D part integration and advanced routing techniques tailored to 3-D surfaces
• Addressing critical design guidelines, including wall thickness, surface quality mold tool considerations, through-holes, trace geometries, and metallization strategies that enable reliable, functional 3-D circuits
• Exploring the end-to-end manufacturing process – from injection molding and laser activation to metallization and component assembly – highlighting both barrel and rack plating methods as well as prototyping options like 3-D printing and soft tooling.

Participants will leave with a depth of understanding encompassing:

• Practical insights into identifying when and why 3D-MID technology adds value, including applications in sensors, antennas, wearable devices, and organic-shaped electronics
• Strategies for reducing design complexity, optimizing form factors and improving functionality through fully integrated, three-dimensional layouts
• A clear roadmap for effectively navigating the design-to-production process, leveraging design platforms, manufacturing partnerships, and prototyping methods to achieve robust, innovative 3D circuit solutions.

Good signal integrity and EMC start with a good PCB design philosophy. It is critical for design engineers to understand the behavior of EM fields. Proper design of the spaces these fields follow through the board is critical. Creating transmission lines that meet the needs of the PDN and fast-switching ICs in today’s high-performance products can be challenging. There are certain questions that need to be answered to define the PCB geometry that will lead to a successful design. This seminar will present an easy-to-understand, science-based approach for PCB design.

What you will learn:

• The basic behavior of EM fields as they move through the PCB and ways to control them
• The most important characteristics of the ICs in the design that affect the PCB layout requirements.

Venturing into the world of flexible circuit design might seem intimidating if you have only designed rigid boards in the past. While flex design has important differences to be aware of, many of the basic principles remain the same. As a designer, it is important to understand how they differ and where the key differences fall in the design process. The goal of this presentation is to provide guidance on what to watch out for in each step of the design process when designing a flex board for the first time.

Key topics to be covered:

• Different types of flex boards: flex, rigid-flex, flex with stiffener
• Importance of early flex fabrication house involvement: stackup, rules, cost
• Stackup considerations: material choices, layer count flexibility
• Mechanical considerations: bend lines and radius, stiffener regions
• Design considerations: footprint modifications, placement guidelines, routing suggestions
• Additional design rules: keepouts around transitions, controlled impedance
• Output files: fabrication drawing details, folded step models

What you will learn:

• The most important differences between rigid and flex design
• Critical questions to ask early in the process
• The importance of collaboration among electrical, mechanical, design and manufacturing early in the process to come up with cost-effective and creative solutions.

This presentation delves into the critical role of vias in ensuring signal integrity by providing optimal return paths in printed circuit boards (PCBs). We’ll explore why a well-defined return path is crucial for containing electromagnetic fields and minimizing noise. This knowledge will be built upon the foundation that planes are the optimal solution for field containment, but are unable to enable return path in the z-axis.

Attendees will gain a practical understanding of via behavior through simulations, starting with common design pitfalls and progressing towards optimized solutions. We’ll analyze real-world scenarios and demonstrate how strategic via placement and design choices can significantly improve signal integrity.

Finally, we’ll examine advanced techniques, including the concept of a “via-in-via” structure for achieving coaxial-like return paths. The session will conclude with guidance on selecting components, such as BGAs, with optimized ground return paths to further enhance PCB performance, ensuring design success.

Key topics to cover:

• The importance of return paths for signal integrity and EMI mitigation
• Learn how to effectively utilize vias to optimize return paths
• Discover advanced via design techniques for high-performance PCBs
• Gain practical knowledge for selecting components with superior return path characteristics

There is running debate among many PCB design engineers about the use of copper pour segments in or on some layers of circuit boards. Some engineers say that copper pours can increase crosstalk, or change impedance of transmission lines, or increase EMI, or have an impact on power delivery, etc. Others say that the opposite is true. This session will discuss the real impact, good and bad, of copper pour segments on signal layers of PCBs.
Key topics covered:

• Reasons given to put copper pour on signal layers
• Should copper pours always connect to ground?
• Measured impact of pours on impedance of lines
• Measured impact on pours on energy coupling
• Measured impact of pours on power delivery
• Impact of copper pours on PCB manufacturability.

The transition from a “works-like” prototype to a scalable production run is often the most volatile phase of hardware development. Engineers frequently fall into the prototype trap. They design with components that are easily accessible via catalog distributors but lack the manufacturer support, price stability, or volume pipelines required for mass production. This mismatch results in costly midstream respins, “unbuildable” bills of materials (BoMs) and stalled market entry.

This session provides a technical framework for Production-Ready Sourcing (PRS). We will move beyond basic availability checks to analyze deeper scalability metrics, such as manufacturer lifecycle status (EOL/NRND), minimum order quantity (MOQ) impacts on unit cost, and the geographic concentration of sub-tier suppliers. Attendees will learn specific PCB layout strategies for second sourcing, including the use of universal land patterns and dual-footprint geometries to accommodate alternate components without requiring new copper. By integrating supply chain intelligence directly into the process, designers can ensure their prototypes are not just functional but also commercially viable. Attendees will leave with a practical checklist to audit their designs for “scale-readiness” before the first board is ever fabricated.

Key topics covered:
This session aims to provide designers with a strategic “scale-up” checklist to ensure their prototype designs are viable for mass production.

• Audit BoMs for scalability: Learn to identify “catalog-only” parts – components available in small quantities but lacking manufacturer support or volume pipelines necessary for a production ramp.
• Design for multi-sourcing: Master techniques for creating “flexible” footprints and land patterns that can accommodate alternate packages (e.g., SOT-23 vs. SC-70) without requiring a PCB respin.
• Sync BoM data with real-time supply chain signals: Discover how to integrate live availability and lifecycle status (EOL/NRND) data directly into the design workflow to catch “dead-end” components at the schematic stage.
• Optimize for the whole lifecycle: Evaluate design choices through the lens of the entire product roadmap, balancing immediate functional requirements with the logistical constraints of volume ramp-up and long-term field support.

Join a group including PCB designers, hiring managers, recruiters and recent graduates as they share their expertise in a career in printed circuit design and manufacturing. Among the topics of this hands-on program are how to prepare for job interviews, demonstrating capabilities with AI skills, networking, and negotiation. Bring your resume and your questions!

Topics to cover:

• Understanding the industry
• Professional presence
• The role of internships
• Resume fundamentals
• Job search strategy
• Interviewing and soft skills
• Compensation and career realities

When an organization decides to change its electrical design software, it can go two ways: 1) it can be met with frustration and resistance, or 2) it can be welcomed with open arms! It’s all about how the decision is reviewed, analyzed and implemented.

To some, the software we use as designers is seen as “replaceable” based on short-term cost considerations. However, those who use it every day know that commitment to the right software can set you up for long-term success (and savings). Sometimes a design software change will make sense, but when? And how? This presentation will cover why this decision should not be underestimated and how to succeed once the decision has been made.

Key topics covered:

• Discussions to have when a change in layout software is being considered
• Ripple effects of layout software decisions throughout the existing design process
• How a layout software change impacts the team and collaborators
• Ways to minimize frustration when creating a transition plan to a new layout software.

What you will learn:

• How to communicate clearly during high-level discussions
• Tips to prepare for a layout software transition
• A roadmap for success when converting a layout from one software to another.

Hayao Nakahara is author of the NTI-100 list of the world’s largest PCB companies and the foremost market authority for the printed circuit industry. This presentation will look at the past, current, and future of the PCB market, what is pushing the industry, and, of course, AI, focusing on various issues not only in the market but also in technology changes.

Via-in-pad plated over (VIPPO) technology offers clear advantages in modern BGA designs, including space savings, improved signal integrity, and more efficient escape routing for fine pitch components. However, when VIPPO and traditional via structures are mixed within the same BGA footprint, the resulting mismatch in coefficient of thermal expansion (CTE) can introduce latent mechanical failure modes that may not appear during manufacturing but emerge later in the field.

This session examines why mixed-structure CTE imbalance creates stress concentrations, how these stresses propagate through solder joints during thermal cycling, and the subtle reliability risks that often go unnoticed in qualification testing. We will outline design strategies, material choices and layout practices that mitigate these failure mechanisms, enabling engineers to fully leverage VIPPO benefits without compromising long-term product reliability.

In preparation for this presentation, we talked to many of the largest PCB manufacturers in the US and abroad. We then developed a list of the most common errors found on incoming designs. We look at each of the errors and discuss ways to find them before the designs are sent out for manufacturing. The methods we will look at include netlist comparison, design for manufacturing and design rule analysis. We also talk about proper documentation needed for PCB manufacturing. We encourage attendee participation and ask folks to bring their challenges for discussion. After this seminar, the PCB designer will take back some knowledge to better assist them in using their existing tools in the market to produce better and more accurate designs.

As electronics manufacturing services (EMS) providers increasingly integrate artificial intelligence (AI) into their operations, new product introduction (NPI) presents both unique opportunities and significant challenges, especially for PCB designers. This session shares practical lessons from experienced presenters to help designers and product developers use the tools and adaptations that leading EMS providers are using. The goal is to benefit new product introductions, where speed, accuracy and adaptability are critical to success.

Drawing on hands-on implementation experience, the presentation will explore key use cases in NPI, including the use of component search agents, demand forecasting, process optimization, defect detection, and design-for-manufacturability analysis. Attendees will gain insight into the technical, organizational, and data-related hurdles encountered – such as mistakes by harried designers, lack of access to historical data, constantly changing product designs, and integration with legacy systems.

Topics to cover:

• Best practices for successful cross-functional collaboration
• Iterative deployment strategies
• Establishing robust data pipelines.

Emphasis will be placed on learning empathy, aligning expectations with business objectives, managing schedules, and ensuring greater success rates.

By the end of this session, participants should have a clearer understanding of how to effectively introduce their designs into the evolving AI-enhanced environment of their EMS partners.

As thermal density in high power electronics continues to increase, the ability to manage heat precisely at the component level has become critical. This study presents direct temperature measurements of Mosfet heat sources across multiple configurations of PCB substrates and thermal enhancement components. Specifically, it evaluates the thermal performance of a high conductivity dielectric from TCLAD, compared to traditional FR-4, using a quadrant-based test board populated with SOT223 power transistors and surface mount thermal bridge (SMTB) components.

The test vehicle was a six-layer PCB, engineered with four identical quadrants, each containing four ZETEX FZ493 SOT223 transistors as heat generating components. This symmetrical layout permitted direct, side-by-side comparisons of different thermal configurations under identical electrical loads and copper geometries. Quadrant 1 featured no SMTBs (serving as the baseline), quadrant 2 included a small SMTB (SMTB2114P30E), quadrant 3 a medium SMTB (SMTB3123A30A), and quadrant 4 a large SMTB (SMTB2920P30E). Both FR-4 and the novel versions of the test board were fabricated and assembled identically to isolate the thermal impact of the dielectric and thermal bridge materials.

Thermal imaging revealed that the novel substrate significantly outperformed FR-4, reducing maximum component temperatures by up to 48°F (26.6°C) in quadrant 1, where no SMTBs were used. When paired with the largest SMTBs in quadrant 4, the novel board achieved a total temperature reduction of 29°C compared to the FR-4 board in quadrant 1. This result clearly demonstrates the combined thermal benefits of using a high-conductivity dielectric material alongside strategically placed heat-spreading components.

The PCB industry has long operated under the assumption that “it’s always been done this way” – from FR-4 substrates and E-glass reinforcement to ENIG finishes and 1.6mm board thickness. But with raw material costs climbing, sustainability mandates tightening and industry standards failing to keep pace with innovation, the conditions for disruption have never been riper. This presentation follows the real-world journey of a natural fiber-based, water-soluble PCB laminate developed as a sustainable alternative to conventional FR-4. Using the novel laminate as a case study, we walk through the four critical stages every disruptive material must navigate – ideation, certification, qualification and integration – offering an honest account of the roadblocks, breakthroughs and lessons learned along the way.

The session also examines the broader forces pressuring the industry to evolve, including soaring copper, gold and E-glass prices, outdated industry standards that inadvertently lock out innovation, and the net-zero commitments of major OEMs that are creating real commercial demand for sustainable alternatives.

What you will learn:

• How a disruptive material technology moves from concept to commercial-scale production, including the certification, testing, and fundraising milestones required at each stage
• Why current industry standards, such as IPC-4101, are inhibiting the adoption of innovative materials and what a shift to performance-based standards could mean for designers and manufacturers
• How rising commodity prices for copper, gold, and E-glass are creating both urgency and opportunity for alternative PCB substrate materials
• The quantifiable environmental impact of switching from FR-4 to bio-based laminates, including life cycle carbon analysis and end-of-life recyclability benefits
• What the growing net-zero commitments of major OEMs mean for the future demand for sustainable PCB materials, and how suppliers can position themselves to meet it.

For a new designer, and even for an experienced designer, component placement can
be a daunting task. Where do we start? How do we decide what to prioritize? Are we
wasting valuable time by focusing on the wrong things at the wrong time? And, most
importantly, what can we do as designers to help solve placement challenges when they
arise?

In this presentation, we will work through the placement of a sample design, focusing on
the decision-making process. We’ll aim to provide a roadmap that any new designer can
use to approach component placement on any design. We’ll see firsthand the effects of
our decisions and what happens when there are conflicting needs.

Key topics covered:

• Preparing a board for component placement (e.g., fixed parts, mounting holes, keepouts, height restrictions, relevant design rules)
• Deciding which circuits to prioritize first and why
• Planning a board flow (how to arrange circuits relative to each other)
• Best design practices
  • Spacing rules
  • Grid usage
  • Uniformity (lining parts up in neat rows/columns, part rotations)
  • One-sided vs. two-sided component placement
• What to look for in circuits where placement is critical to circuit integrity; e.g.,
  • Switching power supplies/driver circuits/amplifiers
  • Decoupling capacitors
  • Circuits with isolated signals: DACs/ADCs, AC/DC, high voltage, opto-isolators
  • Crystals
• Techniques to help deal with component placement in small spaces
• Fine-tuning circuit placement to comply with board geometries/available space.

How do you design a high-speed digital circuit with enough bypass caps in the right area to supply all the peak power demands?

Topics to cover:

• Power distribution network basics
• Three popular approaches to decoupling, with simulation results for each (one is better!)
• Effect of ferrites on layout and PDN.
• New this year: Extra deep dive into bypass cap types and limitations (some have serious problems).

In today’s world of PCB design, where complexity continues to escalate, ensuring manufacturability, reliability and optimal performance has never been more critical. The design rule check (DRC) functionality in modern CAD tools plays a vital role in this process, acting as an automated safety net to catch potential errors before they become costly mistakes. However, the true power of the DRC lies in its ability to enforce well-defined, contextually relevant design rules that require a deep understanding of both the tool and the project-specific requirements.
This presentation focuses on leveraging the DRC within CAD tools to its fullest potential. It will explore the significance of defining and customizing design rules tailored to specific projects, balancing industry standards, manufacturer capabilities and performance requirements. Whether you are new to PCB design or a seasoned professional, this session will provide actionable insights to refine your approach to using the DRC, enabling you to produce higher-quality designs with fewer iterations.
The DRC’s utility is directly tied to the rules the designer sets, making it critical to understand what values and parameters are appropriate for the design. Misconfigured rules can lead to false positives, overlooked issues or unnecessary design constraints. This presentation will discuss the essential considerations for setting up rules, including:

• Aligning DRC parameters with manufacturing capabilities (e.g., minimum trace width, spacing, via size)
• Incorporating electrical performance requirements such as impedance control and high-speed signal integrity
• Understanding the implications of rule hierarchies and priorities.
• Identifying the balance between stringent and flexible rule settings to optimize productivity.

Topics to cover:

• Overview of DRC functionality in modern CAD tools
• Key design rules every PCB designer should consider
• Strategies for gathering and validating rule data from manufacturers and stakeholders
• Tips for managing complex rule hierarchies in multilayer designs
• Using DRC results to identify critical design flaws and bottlenecks
• The relationship between DRC and design for manufacturing (DfM) principles
• Best practices for integrating DRC checks throughout the design cycle
• Real-world examples of successful and unsuccessful DRC implementations.

What you will learn:

• A clear understanding of how to configure DRC settings to match project requirements.
• How to gather and interpret critical data for rule-setting from manufacturers, industry standards, and design objectives.
• Techniques to optimize the DRC process, saving time and reducing errors.
• The impact of well-defined DRC rules on manufacturability, cost, and performance.
• Practical skills for troubleshooting and refining design rule violations.
• Actionable strategies to improve collaboration between design and manufacturing teams.
• Confidence in using CAD tools for robust, high-quality PCB design.

Many engineers are now required to design their own PCBs but have not had the benefit of learning the particular needs of electronics, signals, placement, routing and manufacturability in those boards.
This class will feature an overview of the processes of board design from an engineering perspective. To begin, we will have a conversation about the electronics and physics involved and why controlling rise time, field energy and transmission lines is extremely important to the signals on the board. Next, we’ll discuss placement and topics such as order, flow and setting up potential routing to come. The planes and stackup structure play a major role in the quality of the design and impedance control, especially if the design is high-speed, and plane and capacitor placement are a large part of power distribution as well. The way signals are routed and how their return current is set up is critical to performance.
Also discussed:

• Fanouts
• Grids
• Signal flow from layer to layer
• Layer paired routing and spacing
• HDI technology can be a huge benefit to dense boards, fine-pitch parts and BGAs, so we will go over their setup and routing.

All these topics will include information on signal integrity, EMI and impedance control to make a board that works well from the first build. Many aspects of making a board manufacturable also help to make it less expensive, so an examination of that will wrap the technical things up, followed by information on the pros and cons of hand routing vs. autorouting and the impact on board quality.

This 3.5-hour session is intended for board designers to understand the “things” RF engineers request during PCB layout. Experienced RF engineers will likely not learn anything new from this course, as the material is mainly geared to board designers.
Due to sensitivity in analog circuits, the keys to full functionality (whether you are designing very high frequency analog PCBs, mixing RF with digital or mixing low frequency analog with digital) are signal integrity and noise control in the design of the printed circuit board. The crux of a great design is contained in the board layout.
This course will discuss and define:

• Microstrip, stripline and CPWG = advantages and disadvantages
• Reflections/return loss/VSWR in lumped vs. distributed lines
• 1/4 wavelength couplers and filters designed into PCB copper
• Basic RF and analog PCB layout techniques and strategies
• Mismatched loads, signal splitters and tuning transmission lines
• RF vs. digital power distribution basics
• PCB stackups for mixed RF and digital circuits.

Electronic designs of all kinds are operating with increasingly faster clock rates and rise times. Now digital designs are operating at 112Gbs speeds and faster. At the same time, the pressure to complete designs in fewer design cycles is putting pressure on design teams to deliver designs to manufacturing that are right the first time. With the speeds of signals and components rising into the multi-hundred-gigahertz range, relying on the traditional breadboarding or hardware prototyping process often results in a product never making it to market.

This increase in component speed has made it necessary for design engineers to master the design techniques that were once only the province of supercomputer engineers. This course relies heavily on the proven methods developed for supercomputers and terabit routers. It also draws on experience with disc drives and high-performance video games.

This presentation will examine:

• Failures from crosstalk and reflections
• Problems related to time delays in PCB traces
• EMI failures
• Failures related to poor IC package design
• Losses in the data paths
• Materials induced failures
• Managing very high data rate differential pairs.

Subjects covered:

• Transmission line behavior review
• Calculating impedance
• Terminations
• PCB structures: right-angle bends, vias, plane cuts
• Crosstalk
• Differential signaling
• PCB design process
• Designing the PCB stackup
• EMI containment
• Developing a set of routing rules
• Testing fabricated PCBs
• Crosstalk at 112 and 224 Gb/s
• Traces at 112+ Gb/s
• Trace routing @ 112+ Gb/s
• Trace length tuning at 112+ Gbit
• Signal loss caused by surface coatings
• Vias at 112+ Gbit
• Hyper-advanced skew control
• Ultra-advanced PCB materials
• PCB fabrication
• Determining PCB pad stacks
• Blind and buried vias.

Electromagnetic compatibility, signal integrity and photonics are often discussed and taught as if they are separate disciplines. However, they all share the same physical roots: the control of electromagnetic fields. As data rates get faster, today’s electrical engineer is more likely to encounter projects that touch on all three of these disciplines. Understanding them as an integrated whole can reduce confusion and improve design efficiency.

As such, this seminar builds up understanding of electrical and electronic hardware from physical fundamentals and DC circuits on up to optics. In the first part, we explain electrostatics, magnetostatics, and electromagnetic fields in the simplest terms, starting from the movement of charged particles in circuits. We build up how capacitance and inductance work in circuits and the space around those circuits, and how those factors affect performance. We also explain how even DC circuits end up generating electromagnetic fields of much higher frequencies.

In the second part, we focus on how these fundamentals impact EMC concerns; in particular, how different circuit and structural elements start radiating like antennas, and how we need to provide transmission line-like structures instead to control and contain fields and prevent interference. This section focuses on issues primarily found in the 10kHz to 6GHz domain.

Next up, we focus on signal integrity in the hundreds of MHz to hundreds of GHz range. SI starts with a good PCB design philosophy. It is critical for design engineers to understand the behavior of EM fields. Proper design of the spaces these fields follow through the board is critical. Creating transmission lines that will meet the needs of the PDN and the fast-switching ICs in today’s high-performance products can be a challenge. There are certain questions that need to be answered to define the PCB geometry that will lead to a successful design.

Finally, we will cover topics in photonics and optical communications at greater than 100GHz. These include what optics/photonics means, the main differences between photonics and electronics, materials at optical wavelengths, electromagnetic fields in and around optical components, interaction between photonic and electronic components, and more.

This session will focus on the importance of understanding the advantages and limitations of high density via usage. The key is understanding how to connect the signals and grounds through the board stackup. It is also essential to understand what is needed to provide the proper thermal connections between the ICs and ground planes.

Engineering and design teams are increasingly driven to integrate AI technologies that:

• Use LLMs, neural networks and reinforcement learning
• Accelerate design workflows (schematic, layout) and reduce time-to-market
• Reduce cost across the design cycle
• Reduce risk and minimize errors in complex design tasks
• Keep their teams and business ahead of the competition.

The purpose of this master class is to equip designers and engineers with the knowledge to accelerate their workflows using AI tools. This no-nonsense course focuses on leveraging AI tools in the hardware design workflow. We will explore the time and resources involved in a typical design process and then dive into each of these processes to demonstrate how the presented tools can accelerate workflows across all ecosystems, such as automotive, defense and medical. For the sake of familiarity, this class will build on popular open-source projects. While we will mention specific vendors, our focus will be on the frameworks for interacting with these tools.

This course will alleviate fears that these tools will replace us and instead show how they can become valuable allies. Once equipped with this knowledge, participants can approach their hardware design cycles with the enhanced capabilities of AI-driven workflows. Additionally, it will help you keep pace with technological advancements, preparing you to evaluate the effectiveness of new tools as they emerge.

This course is for:

• All levels of electrical engineers
• All levels of PCB designers
• Product development teams

What you will learn:

• A no-nonsense approach with practical examples and workflows on how to integrate AI into current design processes for all design ecosystems
• How to establish knowledge and frameworks that will apply to current and future AI tools
• Methods that apply to the entire hardware design cycle: libraries, schematics, layout and BoMs
• The real limitations of the tools and what’s to come.

Modern high-speed digital systems place unprecedented demands on PCB stackup design, where signal integrity, reliability, and manufacturability are tightly coupled. This engineering-focused session provides a practical walk-through of stackup development for today’s digital designs, keeping fabrication realities front and center at every step.

The presentation begins with the fundamentals that most strongly influence performance and yield: dielectric material selection, layer pairing strategies, copper balancing, and impedance control. From there, it explores how HDI structures, microvia configurations, and via reliability considerations impact both electrical behavior and long-term robustness. Rather than treating these topics in isolation, the session connects design decisions directly to fabrication constraints, tolerances, and process capabilities.

The session then turns to an increasingly valuable design strategy: leveraging rapid fabrication and assembly to validate stackup assumptions before full production release. Attendees will see how small-scale builds can be used to evaluate impedance margins, crosstalk behavior and microvia reliability under real manufacturing conditions – reducing risk, avoiding costly redesigns and improving first-pass success.

What you will learn:

• How to design stackups that balance electrical performance with manufacturability
• How early fabrication and assembly feedback can be used as a powerful tool to de-risk complex digital designs.

As BGA pitches shrink and pin counts soar toward the multi-thousand-pin mark, the breakout phase is no longer a simple routing exercise – it is a high-stakes engineering challenge where signal integrity, power delivery and manufacturing yield collide. In this intensive tutorial, we move beyond basic fanouts to explore a holistic, system-level approach to BGA breakout and “escaping the field.”

Starting at the foundation: the schematic, we will demonstrate how intelligent symbol partitioning and pin-naming conventions directly influence layout efficiency. From there, we establish a rigorous “hierarchy of escape,” teaching attendees how to prioritize power pads, signal transitions and the critical placement of decoupling capacitors and ferrite beads to minimize loop inductance.

The core of the course focuses on the physical “puzzle” of high-density routing. We will perform a deep-dive analysis into via utilization – comparing advantages and disadvantages of blind, buried and backdrilled vias.

This session will include granular walkthroughs of diverse, real-world architectures:

• The mobile/IoT edge: Breaking out NXP i.MX8 with LPDDR
• High-speed I/O: Routing Intel Thunderbolt 4 and 10GbE networking
• The ultra-scale challenge: Managing thousand-pin custom AI ASICs and DDR5 Layer 2 escape strategies.

Attendees will leave with a toolkit of routing strategies, including pin-swapping logic, pad breakout directionality and methods for maintaining reference plane continuity under dense pin fields.

Learning objectives:

• Pre-layout architecture: Design schematic symbols that anticipate physical routing constraints
• PDN optimization: Strategically place decoupling and ferrites within the BGA field to maximize performance
• Advanced fabrications: Master the use of via-in-pad, microvias and backdrilling for sub-0.5mm pitch devices
• Workflow efficiency: Learn “breakout order” to avoid trapping yourself during complex multilayer escapes.

Most PCBs connect to something, but in many cases connectors and cabling can introduce noise, bit errors, and problems!

As a space and avionics harness designer, I’ll cover:

• How signal integrity works (how energy flows) in cables and connectors
• How wires/cables are made
• Cable types: coaxial, twisted, differential and non-differential, bundled single wires – What you need for your application
• All about twisted wire (how many twists do you need?)
• What determines impedance in non impedance-controlled wiring
• How many grounds are needed in the cable/connector and where they need to be
• How to pick connectors for signal integrity and EMI.

With continuous technological developments, electronic circuits are not only becoming faster and smaller but also more power-hungry. Consequently, related thermal issues are more prevalent than ever because most modern PCBs consist of numerous high-power components such as high-performance processors, transceivers, Mosfets, and high-power LEDs, leading to excessive heat. Additionally, power conversion circuitry, including DC-DC converters and regulators, contributes significantly to temperature elevation and hotspots. Besides the components, the resistance of the electrical connections, copper traces, and vias contribute to heat, and power losses.

Thermal stress stands out as a primary cause of circuit malfunction, resulting in performance degradation or even system malfunction or failure. To address thermal stresses at the layout level, PCB designers must incorporate effective techniques to reduce heating impacts. This includes careful material selection, strategic component placement, power ground plane construction, thermal vias, and more.

This presentation will explore these effective strategies and tricks that layout engineers can adopt to identify and mitigate major hotspots, ultimately enhancing the thermal performance of PCBs.

In modern electronic design, the accuracy and consistency of PCB library components are critical to both product reliability and manufacturing efficiency. By implementing accurate and standards-compliant footprints and well-structured schematic symbols, design teams can ensure consistency, reduce errors and streamline schematic-to-layout workflows
Key topics covered:

• Why librarians are so critical to the design process
• Manufacturing standards and rules integration (DfM)
• Library guideline and optimization techniques
• When to align and when to deviate from industry standards
• How to work with your fabricator and assembler to lock in a component for various implementations.

What you will learn:

• How to design and optimize a component footprint.
• How to efficiently use library footprints and symbols.
• How to reduce overall DFM errors.
• How a well-maintained ECAD library improves design quality and accelerates development cycles.

Design for test (DfT) is a crucial aspect of PCB design that ensures manufacturability, reliability and cost-effective production. By integrating testability considerations early in the design process, engineers can minimize troubleshooting time, reduce field failures and streamline production testing. This session will explore various PCB and PCBA testing methods, the design decisions that support them and best practices to enhance test coverage while balancing cost and complexity.

Key topics covered:

• Overview of common PCB and PCBA testing methods, including ICT, boundary scan, functional testing and x-ray inspection
• The role of test points, access strategies and probe placement in facilitating effective testing
• Tradeoffs among cost, coverage and complexity in different testing methodologies
• The importance of design rule checks (DRCs) and simulation in DfT
• How to integrate boundary scan (JTAG) into a design for enhanced digital testing
• Practical considerations for designing with in-circuit test (ICT) and flying probe test in mind
• Strategies for improving test coverage in high-density and miniaturized designs
• Case studies highlighting the impact of DfT decisions on real-world PCB designs.

What you will learn:

• How to identify and implement the right testing strategy for different PCB designs
• Best practices for incorporating testability features without compromising board size or performance
• Techniques for reducing debugging and production test time through smart DfT decisions
• The advantages and limitations of various testing approaches
• How to collaborate effectively with test engineers and manufacturers to ensure successful testing
• Common DfT mistakes and how to avoid them
• Practical insights and industry trends in DfT for modern PCB design.

This session is ideal for PCB designers, hardware engineers, and manufacturing professionals looking to enhance their understanding of DfT principles and their impact on product quality and efficiency.

Amid the fast-paced advancements in PCB design, thermal consideration and thermal management of designs are of paramount concern. Engineers and designers are constantly seeking innovative ways to meet efficiency and reliability standards. This seminar aims to explain complex thermal theories and introduce practical approaches to optimizing PCB design for superior thermal performance. An examination and understanding of the design strategies and process to promote a performant and reliable system. This will be tied together with design examples and personal anecdotes

Key discussion areas include:

• An explanation of heat transfer mechanisms – conduction, convection, radiation – will establish a solid foundation to explore thermal management in PCB design
• Introducing the process of the Thermal Design Engine and how it applies to your applications
• Unveiling the process of preliminary thermal structuring, physical testing, and refinement of the system, illustrated through case studies.

Further, the seminar will delve into the diverse landscape of PCB materials and design strategies:

• A comprehensive overview of IMS and aluminum boards, shedding light on material selections, stackup configurations, and the mantra “copper is your friend” in board design
• An introduction to copper coins, their types, applications, and their important role in heat dissipation, complemented by a real-world high-power Mosfet design case study and a comparative analysis of a high-power Mosfet with and without a copper coin
• A showcase of simulations reflecting the impact of conductive vs. nonconductive fill vias in thermal management.

The discussion explores simulations of thermal performance, using a comprehensive simulation to evaluate the thermal performance of the discussed design strategies, and integrating learned concepts into system design.

Participants will leave with a depth of understanding encompassing:

• Real-world examples and hands-on experience with various thermal management strategies
• Techniques for effective thermal simulation, analysis, and integration into their PCB design workflow
• Insights into collaborative frameworks that foster innovation in thermal management, de-risking designs, increasing the likelihood of success and reliability

Join us to demystify the intricacies of thermal management in PCB design and propel yourself toward a mastery of the art and science of creating thermally efficient and reliable systems.

In the dynamic realm of electronics, completing a PCB layout is just the tip of the iceberg. The real challenge lies in seamlessly signing off the design and generating the manufacturing release. The significance of having comprehensive documentation, thorough checklists, and strategic review meetings before any design release cannot be overstated.

In the fast-paced world of technology, where time to market is a decisive factor in product success, hasty design releases can prove to be detrimental. Organizations often face nightmares when crucial elements are overlooked. History provides cautionary tales, such as the downfall of giants like Kodak and RIM (Blackberry phones), underscoring the importance of timely product launches.

In this session we'll explore the importance of comprehensive documentation, checklists, and thorough review meetings prior to design release.

In the realm of PCB design, analog to digital converters (ADCs) and digital to analog converters (DACs) play a vital role in contemporary society. As technology continues to advance, there is a growing demand for electronic devices that are more compact, faster, and more reliable.

This presentation aims to explore the key factors, challenges, and strategies associated with noise reduction in PCB design, as well as to increase reliability and performance. The techniques explained will include layout, grounding and power distribution.

The seminar will start with the basics of ADCs and DACs. The second part will show ways for a PCB design to reduce the signal-to-noise ratio.

The class will demonstrate techniques for grouping DC-DC converters (power distribution) and explain “point of load” concepts to designers. Additionally, best practices for PCB layout for FPGA/CPLD, digital logic, op-amps, and oscillators will be included. Also presented: Several guidelines for I/O protection, ESD circuits and cable interfacing (chassis ground).

In summary, topics that will be explored in detail include noise reduction strategies for signal integrity and various design considerations.

ircuit boards for the automotive, handheld device and IoT (Internet of Things) worlds are often driven by the need for low cost (driving very low layer count), moderate to high part density, mixed-signal applications, low power dissipation and sometimes a transmit/receive antenna. This combination of needs makes PCB design an extreme challenge. Creating 1-, 2-, or 4-layer PCBs, with excellent signal integrity and low noise/interference and no EMI issues, can, by itself, be a very serious challenge. A little of the “right” know-how makes the challenge much easier.

Topics covered:

• Frequency concerns in digital and analog PCBs
• Transmission line setup in 1-, 2- and 4-layer PCBs
• Avoiding energy spread in low layer count PCBs
• Signal integrity and EMI control in low layer PCBs
• Power distribution and decoupling in low layer PCBs
• Antenna design and setup in and on the PCB
• A short primer in cost savings at PCB fabrication

The rapid advancement of electronic systems has driven significant innovation in PCB manufacturing technologies to meet increasing demands for higher interconnect density, improved reliability and tighter dimensional control. Modern PCB fabrication has evolved beyond conventional subtractive processes to incorporate advanced materials, precision process control and high-resolution patterning techniques. Key developments include high-density interconnect (HDI) architectures, microvia and stacked via formation, advanced lamination strategies, laser drilling and improved surface finish technologies tailored for fine-pitch assembly and high-frequency applications. Additionally, process integration with automation, in-line inspection, and data-driven manufacturing control has enabled enhanced yield, consistency and traceability, particularly for mission-critical aerospace, defense and high-performance computing systems.

Topics covered:

• The latest PCB manufacturing technologies
• Process innovations, materials considerations and reliability challenges associated with next-generation electronic designs
• Manufacturing scalability, defect mitigation and performance tradeoffs inherent to advanced PCB fabrication
• A comprehensive overview of modern PCB manufacturing capabilities
• Key trends shaping the future of high-reliability electronic hardware.

Join leading subject matter experts in printed circuit design, engineering and manufacturing for an open discussion on the industry’s most pressing problems.

With the pitch of the parts getting tighter and the pin count of BGAs going up, there is a need to get as much routing as possible into very dense areas of the board. HDI/microvias will help accomplish this, but the technology requires some thought and a different setup in terms of what is needed and how to accomplish it from a design perspective.

This presentation will examine:

• A brief overview of some basic information about HDI, including layout efficiencies, types of microvias, stacked and staggered layout, lamination cycles, aspect ratios, when to make the jump to HDI, and an overview of possible HDI stackups
• Examples of fanout and routing strategies, including planning, channels, and pros and cons of each
• Information on the electronics, including performance, impedance, power, routing for return, and layer-paired routing
• Benefits to a board for using HDI, including layer count, trace width size, stub elimination, ability to design with fine-pitched parts, and smaller board size
• Some DfM issues specific to working with HDI.

Do you use power MOSFETs, high-power LEDs, power resistors, or hot processors in your design and want to avoid heat-related system failures? This course covers the best options for managing heat costs effectively and reliably.

Key topics covered:

• Physics of heat transfer and simple math to estimate it
• Semiconductor construction (how they're built to get heat out)
• Thermal management tools (heat sinks, heat pipes, fans, thermal interface material)
• Heatsinking with PCB design for FETs, LEDs, processors, etc.
• 160W power supply design example
• Tools and their limitations (IR imagers, airflow monitors, on board sensors).